Description: SoC, CPU buses generally use response mechanism, non-real-time, data processing using interrupt response mechanism to achieve efficiency. Deal with specific real-time data, and there is no fixed time delay and stability in throughput, so need to design a module to handle real-time data to a non-real-time smoothing over the issue between the bus. By this modular design as an example to explain the non-real-time real-time data bus switch design concepts with several practical technology.
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PLM在模拟集成电路研制管理中的应用.pdf
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