Description: module adder_t7b (co, sum, a, b, ci)
output co
output [3:0] sum
input [3:0] a, b
input ci
reg co
reg [3:0] sum
reg [4:0] tmp
always @(a or b or ci)
begin
tmp = a+ b+ ci
#12 {co, sum} = tmp
end
endmodule
To Search:
File list (Check if you may need any files):
11.txt
Download