Description: SPARTAN-3A XILINX the use of the FPGA family XC3S200A to vector to the system Logic VHDL description expressions, completed the design of Digital Frequency Meter.
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pinlvup\control.sym
.......\control.vhd
.......\count.sym
.......\count.vhd
.......\count_bottom.vhd
.......\fenpin.sym
.......\fenpin.vhd
.......\latch.sym
.......\latch.vhd
.......\multi.sym
.......\multi.vhd
.......\pinlv_up.sch
.......\pinlv_up.schlog
.......\pinlv_up.ucf
.......\pinlv_up_guide.ncd
.......\pinlv_up_summary.html
.......\project_up.ise
.......\project_up.ise_ISE_Backup
.......\project_up.restore
.......\__ISE_repository_project_up.ise_.lock
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