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Title: Asynchronous-communication-examples Download
 Description: FPGA 上的嵌入式系统设计实例,SPARTEN-3E-FPGA, embedded system design example, SPARTEN-3E
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异步通信串行口设计实例\QUARTUS程序\UART\CLK_PDIV.INC
......................\...........\....\CLK_PDIV.SYM
......................\...........\....\CLK_PDIV.TDF
......................\...........\....\CMP_STATE.INI
......................\...........\....\DB\ADD_SUB_INE.TDF
......................\...........\....\..\ADD_SUB_ULE.TDF
......................\...........\....\..\CMPR_MP5.TDF
......................\...........\....\..\CMPR_OL5.TDF
......................\...........\....\..\MUX_19C.TDF
......................\...........\....\..\MUX_35C.TDF
......................\...........\....\..\MUX_Q8C.TDF
......................\...........\....\..\MUX_S4C.TDF
......................\...........\....\..\UART-SIM.VWF
......................\...........\....\..\UART.DB_INFO
......................\...........\....\..\UART.ECO.CDB
......................\...........\....\..\UART.SLD_DESIGN_ENTRY.SCI
......................\...........\....\..\UART_CMP.QRPT
......................\...........\....\..\UART_HIER_INFO
......................\...........\....\..\UART_SIM.QRPT
......................\...........\....\..\UART_SYN_HIER_INFO
......................\...........\....\FILTERX.INC
......................\...........\....\FILTERX.SYM
......................\...........\....\FILTERX.TDF
......................\...........\....\FILT_TPL.INC
......................\...........\....\FILT_TPL.SYM
......................\...........\....\FILT_TPL.TDF
......................\...........\....\PAR_GEN.INC
......................\...........\....\PAR_GEN.SYM
......................\...........\....\PAR_GEN.TDF
......................\...........\....\README.TXT
......................\...........\....\RX.BSF
......................\...........\....\RX.SYM
......................\...........\....\RX.TDF
......................\...........\....\SHIFTREG.INC
......................\...........\....\SHIFTREG.SYM
......................\...........\....\SHIFTREG.TDF
......................\...........\....\SIM.CFG
......................\...........\....\TX.BSF
......................\...........\....\TX.SYM
......................\...........\....\TX.TDF
......................\...........\....\UART.ACF
......................\...........\....\UART.DONE
......................\...........\....\UART.FLOW.RPT
......................\...........\....\UART.GDF
......................\...........\....\UART.HIF
......................\...........\....\UART.INC
......................\...........\....\UART.MAP.EQN
......................\...........\....\UART.MAP.RPT
......................\...........\....\UART.QPF
......................\...........\....\UART.QSF
......................\...........\....\UART.QWS
......................\...........\....\UART.SIM.RPT
......................\...........\....\UART.SYM
......................\...........\....\UART.VWF
......................\...........\....\UARTCTRL.BSF
......................\...........\....\UARTCTRL.SYM
......................\...........\....\UARTCTRL.TDF
......................\...........\....\UARTTEST.ACF
......................\...........\....\UARTTEST.GDF
......................\...........\....\UARTTEST.HIF
......................\...........\....\UARTTEST.MMF
......................\...........\....\UARTTEST.SCF
......................\...........\....\UART_ASSIGNMENT_DEFAULTS.QDF
......................\...........\....\DB
......................\...........\UART
......................\QUARTUS程序
异步通信串行口设计实例
    

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