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VHDL-FPGA-Verilog
Title:
verilog_18bit_Div
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Category:
Algorithm
Tags:
[Matlab]
[源码]
File Size:
5kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
352255195
Description:
18 input precision divider verilog prepared with documentation and test code.
Downloaders recently:
[
More information of uploader 352255195
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To Search:
File list
(Check if you may need any files):
Divdata4R.txt DivModel.v DivModel_tb.v DivRand.m DivTask.v 除法器.txt
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