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VHDL-FPGA-Verilog
Title:
uart.ZIP
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Category:
VHDL-FPGA-Verilog
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File Size:
4kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
jixuefengpq
Description:
a general UART port. Tested.
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(Check if you may need any files):
uart_baut_clk.vhd uart_baut_dbuf.vhd uart_baut_dsout.vhd uart_baut_ncs.vhd uart_rx.vhd uart_tx.vhd
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