Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: vhdl Download
 Description: Programmable logic devices and VHDL courseware as well as after-school exercise. Can be used for self-programmable logic devices and VHDL, very basic, suitable for beginners.
 Downloaders recently: [More information of uploader 363344362]
 To Search:
File list (Check if you may need any files):
ch5\ch5.pdf
...\ch5.ppt
...\.lk_div\clk_div.vhd
...\.......\clk_div.vwf
...\.......\cntnbits.vhd
...\document\clock.jpg
...\........\led.jpg
...\........\led.vsd
...\........\SPORT-WATCH FSM.vsd
...\........\sport-watch.pdf
...\........\sport-watch.vsd
...\........\stopwatch.jpg
...\ex5_14\cntnbits.vhd
...\......\cntnbits.vwf
...\.....6\moore.vhd
...\.....7\mealy.vhd
...\exercise3.ppt
...\MyDesign\ex5_14\cntnbits.vhd
...\........\......\cntnbits.vwf
...\........\.....6\moore.vhd
...\........\.....7\mealy.vhd
...\........\watch\clk60.vhd
...\........\.....\cmp_state.ini
...\........\.....\cnt_bcdm24.vhd
...\........\.....\cnt_bcdm24v.vhd
...\........\.....\cnt_bcdm60.vhd
...\........\.....\cnt_bcdm60v.vhd
...\........\.....\db\add_sub_2ch.tdf
...\........\.....\..\watch-sim.vwf
...\........\.....\..\watch.asm.qmsg
...\........\.....\..\watch.cmp.cdb
...\........\.....\..\watch.cmp.ddb
...\........\.....\..\watch.cmp.hdb
...\........\.....\..\watch.cmp.rdb
...\........\.....\..\watch.cmp.tdb
...\........\.....\..\watch.csf.qmsg
...\........\.....\..\watch.db_info
...\........\.....\..\watch.fit.qmsg
...\........\.....\..\watch.hif
...\........\.....\..\watch.map.cdb
...\........\.....\..\watch.map.hdb
...\........\.....\..\watch.map.qmsg
...\........\.....\..\watch.pre_map.hdb
...\........\.....\..\watch.project.hdb
...\........\.....\..\watch.rpp.qmsg
...\........\.....\..\watch.rtlv.hdb
...\........\.....\..\watch.rtlv_rvd.rvd
...\........\.....\..\watch.rtlv_sg.cdb
...\........\.....\..\watch.rtlv_sg_swap.cdb
...\........\.....\..\watch.sgdiff.cdb
...\........\.....\..\watch.sgdiff.hdb
...\........\.....\..\watch.sim.hdb
...\........\.....\..\watch.sim.qmsg
...\........\.....\..\watch.sim.rdb
...\........\.....\..\watch.tan.qmsg
...\........\.....\..\watch.watch.sld_design_entry.sci
...\........\.....\..\watch_cmp.qrpt
...\........\.....\..\watch_hier_info
...\........\.....\..\watch_sim.qrpt
...\........\.....\..\watch_syn_hier_info
...\........\.....\decode48.vhd
...\........\.....\sim.cfg
...\........\.....\watch.asm.rpt
...\........\.....\watch.done
...\........\.....\watch.fit.eqn
...\........\.....\watch.fit.rpt
...\........\.....\watch.flow.rpt
...\........\.....\watch.map.eqn
...\........\.....\watch.map.rpt
...\........\.....\watch.pin
...\........\.....\watch.pof
...\........\.....\watch.qpf
...\........\.....\watch.qsf
...\........\.....\watch.qws
...\........\.....\watch.sim.rpt
...\........\.....\watch.tan.rpt
...\........\.....\watch.tan.summary
...\........\.....\watch.vhd
...\........\.....\watch.vwf
...\........\....._FSM\cmp_state.ini
...\........\.........\db\watch_FSM-sim.vwf
...\........\.........\..\watch_FSM.asm.qmsg
...\........\.........\..\watch_FSM.cmp.cdb
...\........\.........\..\watch_FSM.cmp.ddb
...\........\.........\..\watch_FSM.cmp.hdb
...\........\.........\..\watch_FSM.cmp.rdb
...\........\.........\..\watch_FSM.cmp.tdb
...\........\.........\..\watch_FSM.csf.qmsg
...\........\.........\..\watch_FSM.db_info
...\........\.........\..\watch_FSM.fit.qmsg
...\........\.........\..\watch_FSM.hif
...\........\.........\..\watch_FSM.map.cdb
...\........\.........\..\watch_FSM.map.hdb
...\........\.........\..\watch_FSM.map.qmsg
...\........\.........\..\watch_FSM.pre_map.hdb
...\........\.........\..\watch_FSM.project.hdb
...\........\.........\..\watch_FSM.rtlv.hdb
...\........\.........\..\watch_FSM.rtlv_sg.cdb
...\........\.........\..\watch_FSM.rtlv_sg_swap.cdb
...\........\.........\..\watch_FSM.sgdiff.cdb
    

CodeBus www.codebus.net