Description: verilog language, clock module generates, and divide the clock for different frequency
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clock_generator\clock_generator\clk_generator_summary.html
...............\...............\clock_generator.ise
...............\...............\clock_generator.ise_ISE_Backup
...............\...............\clock_generator.restore
...............\...............\clock_generator.v
...............\...............\clock_generator_summary.html
...............\...............\DCM1.xaw
...............\...............\_xmsgs
...............\clock_generator
clock_generator
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