- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 62kb
- Update:
- 2013-10-21
- Downloads:
- 0 Times
- Uploaded by:
- 许晨雪
Description: The experiment is based on the VHDL design a subway automatic ticketing system. The system can be a maximum of nine tickets sold, and to achieve homing, show ticket, cancellation and other functions. Divided into the control module, calculation module, frequency module, ticketing module, display module, etc. five functional modules.
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subway7\db\prev_cmp_subway7.asm.qmsg
.......\..\prev_cmp_subway7.fit.qmsg
.......\..\prev_cmp_subway7.map.qmsg
.......\..\prev_cmp_subway7.qmsg
.......\..\prev_cmp_subway7.tan.qmsg
.......\..\subway7.db_info
.......\..\subway7.eco.cdb
.......\..\subway7.sld_design_entry.sci
.......\subway7.asm.rpt
.......\subway7.cdf
.......\subway7.done
.......\subway7.dpf
.......\subway7.fit.rpt
.......\subway7.fit.smsg
.......\subway7.fit.summary
.......\subway7.flow.rpt
.......\subway7.map.rpt
.......\subway7.map.summary
.......\subway7.pin
.......\subway7.pof
.......\subway7.qpf
.......\subway7.qsf
.......\subway7.qws
.......\subway7.tan.rpt
.......\subway7.tan.summary
.......\subway7.vhd
.......\subway7.vhd.bak
.......\subway7_assignment_defaults.qdf
.......\db
subway7
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