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VHDL-FPGA-Verilog
Title:
xyj
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Category:
VHDL-FPGA-Verilog
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File Size:
2kb
Update:
2018-01-19
Downloads:
1 Times
Uploaded by:
观水观澜
Description:
The realization of the conversion, timing and alarm function of the six states of the washing machine.
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More information of uploader 观水观澜
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Size
Date
xyj.vhd
8044
2017-12-31
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Total codes:
120
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Total size:
1500
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Today updated:368
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