vhdl cpu can do add sub and so on

CPU设计_李敏_23020062203768\CPU设计实验报告.doc
...........................\源代码\alu.bsf
...........................\......\alu.vhd
...........................\......\cmp_state.ini
...........................\......\cpu.asm.rpt
...........................\......\cpu.bdf
...........................\......\cpu.done
...........................\......\cpu.fit.eqn
...........................\......\cpu.fit.rpt
...........................\......\cpu.fit.summary
...........................\......\cpu.fld
...........................\......\cpu.flow.rpt
...........................\......\cpu.map.eqn
...........................\......\cpu.map.rpt
...........................\......\cpu.map.summary
...........................\......\cpu.pin
...........................\......\cpu.pof
...........................\......\cpu.ppl
...........................\......\cpu.qpf
...........................\......\cpu.qsf
...........................\......\cpu.qws
...........................\......\cpu.sof
...........................\......\cpu.tan.rpt
...........................\......\cpu.tan.summary
...........................\......\db\add_sub_m8g.tdf
...........................\......\..\add_sub_p7g.tdf
...........................\......\..\cpu.asm.qmsg
...........................\......\..\cpu.cbx.xml
...........................\......\..\cpu.cmp.cdb
...........................\......\..\cpu.cmp.hdb
...........................\......\..\cpu.cmp.rdb
...........................\......\..\cpu.cmp.tdb
...........................\......\..\cpu.cmp0.ddb
...........................\......\..\cpu.db_info
...........................\......\..\cpu.eco.cdb
...........................\......\..\cpu.fit.qmsg
...........................\......\..\cpu.hier_info
...........................\......\..\cpu.hif
...........................\......\..\cpu.map.cdb
...........................\......\..\cpu.map.hdb
...........................\......\..\cpu.map.qmsg
...........................\......\..\cpu.pre_map.cdb
...........................\......\..\cpu.pre_map.hdb
...........................\......\..\cpu.psp
...........................\......\..\cpu.rtlv.hdb
...........................\......\..\cpu.rtlv_sg.cdb
...........................\......\..\cpu.rtlv_sg_swap.cdb
...........................\......\..\cpu.sgdiff.cdb
...........................\......\..\cpu.sgdiff.hdb
...........................\......\..\cpu.signalprobe.cdb
...........................\......\..\cpu.sld_design_entry.sci
...........................\......\..\cpu.sld_design_entry_dsc.sci
...........................\......\..\cpu.syn_hier_info
...........................\......\..\cpu.tan.qmsg
...........................\......\..\cpu_cmp.qrpt
...........................\......\debug_unit.bsf
...........................\......\debug_unit.vhd
...........................\......\exe_unit.bdf
...........................\......\exe_unit.bsf
...........................\......\flagreg.bsf
...........................\......\flagreg.vhd
...........................\......\id_unit.bsf
...........................\......\id_unit.vhd
...........................\......\mem_unit.bsf
...........................\......\mem_unit.vhd
...........................\......\reg.bsf
...........................\......\reg.vhd
...........................\......\timer.bsf
...........................\......\timer.vhd
...........................\......\db
...........................\源代码
CPU设计_李敏_23020062203768

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