FPGA工程包\HANDHELD_DSO_PROJECT_V2.0\.sopc_builder\install.ptf
..........\.........................\.............\install2.ptf
..........\.........................\.............\preferences.xml
..........\.........................\AC_DC1.v
..........\.........................\AC_DC2.v
..........\.........................\adc_clk_module.bdf
..........\.........................\adc_clk_module.bsf
..........\.........................\altpll0.bsf
..........\.........................\altpll0.inc
..........\.........................\altpll0.ppf
..........\.........................\altpll0.qip
..........\.........................\altpll0.tdf
..........\.........................\altpll0_wave0.jpg
..........\.........................\altpll0_waveforms.html
..........\.........................\altpll1.bsf
..........\.........................\altpll1.inc
..........\.........................\altpll1.ppf
..........\.........................\altpll1.qip
..........\.........................\altpll1.tdf
..........\.........................\altpll1_wave0.jpg
..........\.........................\altpll1_waveforms.html
..........\.........................\ATT1.v
..........\.........................\ATT2.v
..........\.........................\Block1.bdf
..........\.........................\Block4.bdf
..........\.........................\clk_div.bsf
..........\.........................\clk_div.v
..........\.........................\clk_div.v.bak
..........\.........................\cpu.ocp
..........\.........................\cpu.sdc
..........\.........................\cpu.v
..........\.........................\cpu_bht_ram.mif
..........\.........................\cpu_dc_tag_ram.mif
..........\.........................\cpu_ic_tag_ram.mif
..........\.........................\cpu_jtag_debug_module_sysclk.v
..........\.........................\cpu_jtag_debug_module_tck.v
..........\.........................\cpu_jtag_debug_module_wrapper.v
..........\.........................\cpu_mult_cell.v
..........\.........................\cpu_ociram_default_contents.mif
..........\.........................\cpu_rf_ram.mif
..........\.........................\cpu_rf_ram_a.mif
..........\.........................\cpu_rf_ram_b.mif
..........\.........................\cpu_test_bench.v
..........\.........................\cut_off.bsf
..........\.........................\cut_off.v
..........\.........................\cut_off.v.bak
..........\.........................\data_mux.bsf
..........\.........................\data_mux_2.bsf
..........\.........................\data_mux_2.v
..........\.........................\data_mux_2.v.bak
..........\.........................\data_sel.v
..........\.........................\data_sel.v.bak
..........\.........................\.b\add_sub_1ph.tdf
..........\.........................\..\altsyncram_29f1.tdf
..........\.........................\..\altsyncram_7ve1.tdf
..........\.........................\..\altsyncram_9tl1.tdf
..........\.........................\..\altsyncram_9vc1.tdf
..........\.........................\..\altsyncram_bm61.tdf
..........\.........................\..\altsyncram_bve1.tdf
..........\.........................\..\altsyncram_c9d1.tdf
..........\.........................\..\altsyncram_e502.tdf
..........\.........................\..\altsyncram_ig22.tdf
..........\.........................\..\altsyncram_j9f1.tdf
..........\.........................\..\altsyncram_lo31.tdf
..........\.........................\..\altsyncram_nse1.tdf
..........\.........................\..\altsyncram_p2f1.tdf
..........\.........................\..\altsyncram_pkf1.tdf
..........\.........................\..\altsyncram_q2f1.tdf
..........\.........................\..\altsyncram_qed1.tdf
..........\.........................\..\altsyncram_ro61.tdf
..........\.........................\..\altsyncram_stf1.tdf
..........\.........................\..\altsyncram_t072.tdf
..........\.........................\..\altsyncram_u0g1.tdf
..........\.........................\..\altsyncram_vo61.tdf
..........\.........................\.