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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: DDR3-SDRAM-Verilog-Model Download
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  • [VHDL] [源码]
  • File Size:
  • 69kb
  • Update:
  • 2015-12-16
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1024Mb_ddr3_parameters.vh
2048Mb_ddr3_parameters.vh
4096Mb_ddr3_parameters.vh
8192Mb_ddr3_parameters.vh
ddr3.v
ddr3_dimm.v
ddr3_mcp.v
ddr3_module.v
readme.txt
subtest.vh
tb.v

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