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[Other resource] pci144_vhdl

Description: PCI vhdl for Fpga designer to design PCI IP
Platform: | Size: 3617 | Author: 李晓媛 | Hits:

[Other resource] pci-t32-usg-3hv02n00s00

Description: Cast IP PCI- Target32 User Manual
Platform: | Size: 514479 | Author: 李芊 | Hits:

[Embeded-SCM Develop] pcit32_lattice

Description: PCI接口的Verilog源代码-PCI connection Verilog source code
Platform: | Size: 397312 | Author: 包盛花 | Hits:

[VHDL-FPGA-Verilog] pci_vhdl

Description: PCI的VHDL源码希望对大家有用！-PCI VHDL source hope useful for all!
Platform: | Size: 27648 | Author: 林建加 | Hits:

[Applications] pci_core

Description: PCI logicore,在某网站上下载的ip核文件，希望具有参考价值，-PCI logicore, at a certain site to download the ip nuclear document, hoping that with a reference value,
Platform: | Size: 91136 | Author: 王林 | Hits:

[Software Engineering] EP2C35

Description: Altera原版PCI开发板原理图EP2C35-Altera original PCI development board schematics EP2C35
Platform: | Size: 573440 | Author: 风帆 | Hits:

[Other Embeded program] or1k[1].tar

Description: 好东西啊,PCI的IP核.大家快下吧.@可以用来参考.FPGA设计的-Ah good things, PCI
Platform: | Size: 1132544 | Author: chen qiming | Hits:

[Embeded-SCM Develop] getpcinfo

Description: 用于计算机中心的PC机管理,通过WMI获取本单位PC的名称,IP地址,网卡地址,硬盘序列号,CPU序列号,硬盘大小,内存大小等信息.然后转换成EXCEL表格发送到管理员的EMAIL中.
Platform: | Size: 2821120 | Author: 旺旺旺 | Hits:

[Other] FPGAIPcore_PCI

Description:
Platform: | Size: 5381120 | Author: 屈均伟 | Hits:

[VHDL-FPGA-Verilog] pci144_vhdl

Description: PCI vhdl for Fpga designer to design PCI IP
Platform: | Size: 3072 | Author: 李晓媛 | Hits:

[VHDL-FPGA-Verilog] Pcit32vhdl

Description: PCI 32 target IP for Fpga/asic Designer
Platform: | Size: 428032 | Author: 李晓媛 | Hits:

[Other] pci-t32-usg-3hv02n00s00

Description: Cast IP PCI- Target32 User Manual
Platform: | Size: 514048 | Author: 李芊 | Hits:

[Embeded-SCM Develop] cast_pci-m32_usg-3v09n00s00

Description: Cast IP PCI- Master32 User Manual
Platform: | Size: 1456128 | Author: 李芊 | Hits:

[VHDL-FPGA-Verilog] PCI-T32

Description: PCI.VHD, THE INTERFACE MODULE WITH PCI AGENT CHIP --v1.0: For CY7C9689, First Version working on L01A chip --V2.0: For simplified PCI Agent, Xilinx and AMD chips
Platform: | Size: 1024 | Author: 7845623 | Hits:

[VHDL-FPGA-Verilog] rs1_7seg_pci-0.0.1.tar

Description: Raggedstone1 IP core. Raggedstone1 is a low-cost Spartan3 FPGA based PCI development board made by Enterpoint Ltd. -Raggedstone1 IP core.Raggedstone1 is a low-cost Spartan3 FPGA based PCI development board made by Enterpoint Ltd.
Platform: | Size: 77824 | Author: 张治国 | Hits:

[VHDL-FPGA-Verilog] PCI-IPcoreor1k[1]

Description: PCI的ip core，VHDL代码，希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
Platform: | Size: 1064960 | Author: 李明 | Hits:

[VHDL-FPGA-Verilog] pci_core.tar

Description: vhdl 写的 PCI IP核程序，已经过测试-pci ip core
Platform: | Size: 23552 | Author: planet1997 | Hits:

[VHDL-FPGA-Verilog] OpenCorespcicore

Description: PCI IP核功能实现，符合V2.2协议-realize pci function
Platform: | Size: 1203200 | Author: sophie | Hits:

[Embeded-SCM Develop] pci.tar

Description: verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输-The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transactions originating on the PCI bus, the other one handling transactions originating on the WISHBONE bus.
Platform: | Size: 13253632 | Author: yemao | Hits:

[VHDL-FPGA-Verilog] pci32tlite_oc_latest.tar

Description: pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC s in ALTERA CYCLONE II FPGA).-pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC' s in ALTERA CYCLONE II FPGA).
Platform: | Size: 7813120 | Author: shen | Hits:
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