Description: 这是一个verilog源码的优先编码器,可以通过led显示结果。-This is a Verilog source priority encoder, can be led through the result will be displayed. Platform: |
Size: 117760 |
Author:王强 |
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Description: 最高优先级编码器和直流电机控制器,供初学者学习使用,方便快捷,有很强的参考价值-The highest priority encoder and DC motor controller, for beginners learning to use, convenient and has a strong reference value Platform: |
Size: 3072 |
Author:张楚荀 |
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Description: 这次设计的抢答器主要四部分组成,由优先编码器,寄存器和译码器组成的抢答电路,十进制计数器组成的倒计时电路,555定时器组成的秒脉冲发生器,十六进制计数器组成的计数器。-The design of the Responder mainly of four parts, by the priority encoder, register, and the composition of the answer in the decoder circuit, consisting of decimal counter countdown circuit, 555 timer pulse generator consisting of seconds, consisting of the hexadecimal counter counter. Platform: |
Size: 311296 |
Author:小王珊珊 |
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Description: A priority encoder is a circuit or algorithm that compresses multiple binary inputs into a smaller number of outputs. The output of a priority encoder is the binary representation of the ordinal number starting from zero of the most significant input bit. They are often used to control interrupt requests by acting on the highest priority request.
If two or more inputs are given at the same time, the input having the highest priority will take precedence. An example of a single bit 4 to 2 encoder is shown, where highest-priority inputs are to the left and "x" indicates an irrelevant value - i.e. any input value there yields the same output since it is superseded by higher-priority input.
Platform: |
Size: 109568 |
Author:swapnil |
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Description: 在Quartus II中用VHDL语言编写的优先级编码器程序-In the Quartus II VHDL language using the priority encoder program Platform: |
Size: 183296 |
Author:林燕 |
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