Search - Quartus II DDS

[SCM] 多功能高精度信号发生器的设计

Description: 摘要：直接数字频率合成(DDS)是七十年代初提出的一种新的频率合技术，其数字结构满足了现代电子系统的许多要求，因而得到了迅速地发展。现场可编程门阵列器件(FPGA)的出现，改变了现代电子数字系统的设计方法，提出了一种全新的设计模式。本设计结合这两项技术，并利用单片机控制灵活的特点，开发了一种新的函数波形发生器。在实现过程中，本设计选用了Altera公司的EP1C6Q240C8芯片作为产生波形数据的主芯片，充分利用了该芯片的超大集成性和快速性。在控制芯片上选用了AT89C51单片机作为控制芯片。本设计中，FPGA芯片的设计和与控制芯片的接口设计是一个难点，本文利用Altera的设计工具Quartus II并结合Verilog-HDL语言，采用硬件编程的方法很好地解决了这一问题。本文首先介绍了函数波形发生器的研究背景和DDS的理论。然后详尽地叙述了用EP1C6Q240C8完成DDS模块的设计过程，这是本设计的基础。接着分析了整个设计中应处理的问题，根据设计原理就功能上进行了划分，将整个仪器功能划分为控制模块、外围硬件、FPGA器件三个部分来实现。然后就这三个部分分别详细地进行了阐述。最后，通过系列实验，详细地说明了本设计的功能、性能、实现和实验结果。并结合在设计中的一些心得体会，提出了本设计中的一些不足和改进意见。通过实验说明，本设计达到了预定的要求，并证明了采用软硬件结合，利用DDS技术实现函数波形发生器的方法是可行的。关键词：直接数字频率合成；现场可编程门阵列；函数波形发生器；频谱分析；仿真含图原版论文
Platform: | Size: 2195647 | Author: nacker@126.com | Hits:

[VHDL-FPGA-Verilog] DDS_VHDL_xzy

Description: 在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器，芯片是Altera公司的-in EDA software development QuartusII use VHDL DDS signal generator , chip companies are Altera
Platform: | Size: 4760576 | Author: xiaoyong | Hits:

[VHDL-FPGA-Verilog] dds

Description: 直接数字频率合成器，基于vhdl语言，在qartus II上实现，下载调试成功-Direct digital frequency synthesizer, based on the VHDL language, in qartus II achieved a successful download debugging
Platform: | Size: 316416 | Author: 浮云 | Hits:

[Software Engineering] 07_DDSmokuai

Description: DDS模块 EWB Quartus2编译电子综合设计试验箱程序-DDS module EWB Quartus2 chamber compile electronic integrated design process
Platform: | Size: 75776 | Author: 罗健 | Hits:

[Other] Sinout

Description: dds正弦可控发生计全结果用到matlab，dsp，Quartus II 6.0软件-dds controllable sinusoidal occurred wholly the result of use of matlab, dsp, Quartus II 6.0 software
Platform: | Size: 134144 | Author: linjun | Hits:

[VHDL-FPGA-Verilog] learn_dds

Description: 基于quartus ii 9.0的简易dds波形发生器，可以产生正弦，方波，三角波，可变幅，可变频。非常适合学习使用，使用时请按自己的芯片和引脚设置-Quartus ii 9.0 Based on dds simple waveform generator can produce sine, square, triangle wave can be amplitude, frequency can be. Very suitable for learning to use, when used by their chip and pin set
Platform: | Size: 732160 | Author: 陈东旭 | Hits:

[VHDL-FPGA-Verilog] tiaopin

Description: 开题报告，基于Quartus ii的DDS设计和实现。-Opening report, based on Quartus ii of DDS design and implementation.
Platform: | Size: 146432 | Author: fangming | Hits:

[VHDL-FPGA-Verilog] DDS_100325(13)_success

Description: QUARTUS II环境下VHDL语言编写DDS程序，双数字信号输出，一为正弦波幅值输出，一正弦波差值信号。时钟2^21HZ，带24bits频率控制字。-QUARTUS II environment, VHDL language DDS program, two digital signal output, an amplitude for the sine wave output, a sine wave difference signal. Clock 2 ^ 21HZ, with 24bits frequency control word.
Platform: | Size: 1087488 | Author: 骆东君 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 这是一个dds产生方波、三角波、正弦波的代码。请用Quartus II打开-This is a dds produce square wave, triangle wave, sine wave code. Please open the Quartus II
Platform: | Size: 809984 | Author: kydchen | Hits:

[VHDL-FPGA-Verilog] BPSK

Description: 在quartus ii下完成的用VHDL语言编写的数字式调频BPSK的调制，其中DDS和成型滤波使用ip核完成-Accomplished in quartus ii the use of VHDL language digital FM BPSK modulation, which use the ip filter DDS and forming complete nuclear
Platform: | Size: 326656 | Author: | Hits:

[VHDL-FPGA-Verilog] dds

Description: verilog语言编写，在Quartus II里仿真DDS的产生，包括所有仿真生成的相关文件，-verilog language in the Quartus II DDS in the generation of simulation, including all documents generated by the simulation,
Platform: | Size: 3013632 | Author: 颜小超 | Hits:

[VHDL-FPGA-Verilog] 8bitDDS

Description: 在QUARTUS II 8.0下做的基于DDS的多功能调制器，可实现ASK、FSK、BPSK调制。用SIGNALTAP仿真测试正确。-A In multi-function modulator based on DDS in QUARTUS II 8.0 , can realize the ASK, FSK, BPSK modulation. With SIGNALTAP simulation test right.
Platform: | Size: 3817472 | Author: 高飞 | Hits:

[Other Embeded program] sopc_lcd_led

Description: 利用De0_nano建立的SOPC系统，其中包含有LCD，LED，DDS函数发生和ADC等源程序。工程编译环境为Quartus II 11.0，eclipse for sopc。-Established by De0_nano SOPC system, which includes LCD, LED, DDS functions occurrence and ADC and other source. Project build environment for the Quartus II 11.0, eclipse for sopc.
Platform: | Size: 32747520 | Author: 包文博 | Hits:

[VHDL-FPGA-Verilog] ep1c12_29_dds

Description: DDS设计：该程序完成了在Quartus Ⅱ上使用VHDL语言实现的DDS波形调制设计-DDS Design: The procedure is completed in Quartus ii the DDS waveform modulation design using VHDL language
Platform: | Size: 494592 | Author: 无敌县令 | Hits:

[VHDL-FPGA-Verilog] dds_work

Description: verilog语言编写，在Quartus II里仿真DDS的产生，包括所有仿真生成的相关文件--verilog language in the Quartus II DDS in the generation of simulation, including all documents generated by the simulation,
Platform: | Size: 5081088 | Author: 郑鹏岩 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 12位精度的DDS。quartus ii 编译通过。所有源代码正确，可用。-12 precision DDS. quartus ii compile. All source code is correct and available.
Platform: | Size: 79872 | Author: ecnu | Hits:

[Communication] DDS

Description: 基于DDS原理，利用VHDL语言进行正弦波、三角波、锯齿波、矩形波等波形的发生。包括完整代码和QUARTUS II工程。-Based on DDS principle, the use of VHDL, sine, triangle, sawtooth, square wave waveform occurs. Including the complete code and QUARTUS II project.
Platform: | Size: 147456 | Author: chuangfen | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[SCM] 多功能高精度信号发生器的设计

[VHDL-FPGA-Verilog] DDS_VHDL_xzy

[VHDL-FPGA-Verilog] dds

[Software Engineering] 07_DDSmokuai

[Other] Sinout

[VHDL-FPGA-Verilog] learn_dds

[VHDL-FPGA-Verilog] tiaopin

[VHDL-FPGA-Verilog] DDS_100325(13)_success

[VHDL-FPGA-Verilog] DDS

[VHDL-FPGA-Verilog] BPSK

[VHDL-FPGA-Verilog] dds

[VHDL-FPGA-Verilog] 8bitDDS

[Other Embeded program] sopc_lcd_led

[VHDL-FPGA-Verilog] ep1c12_29_dds

[VHDL-FPGA-Verilog] dds_work

[VHDL-FPGA-Verilog] dds

[Communication] DDS

[VHDL-FPGA-Verilog] DDSpro

[VHDL-FPGA-Verilog] dds

[VHDL-FPGA-Verilog] DDS

CodeBus www.codebus.net