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[Other] TSOP

Description: 关于三星嵌入式开发的重要资料，中文文档，具有重要价值-Samsung embedded development on the important data that the Chinese document is of great value
Platform: | Size: 1342329 | Author: 秦川 | Hits:

[Other] TSOP

Description: 关于三星嵌入式开发的重要资料，中文文档，具有重要价值-Samsung embedded development on the important data that the Chinese document is of great value
Platform: | Size: 1342464 | Author: 秦川 | Hits:

[VHDL-FPGA-Verilog] Flashcontrollerxilinx

Description: Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations — Separate VCCQ for 5 volt I/O tolerance n Automated Program and Erase — Page program: 512 + 16 bytes — Block erase: 8 K + 256 bytes n Block architecture — 8 Kbyte blocks + 256 byte spare area (separately erasable, readable, and programmable) — 512 byte page + 16 byte spare area for ECC and other system overhead information n Fast read and program performance (typical values) — Read: < 7 μs initial, < 50 ns sequential — Program: 200 μs (full page program at 400 ns/byte) — Erase: < 2 ms/8 Kbyte block n Pinout and package — Industry Standard NAND compatible pinout with 8-bit I/O bus and control signals — TSOP-II 44/40 pin package (standard and reverse) with copper lead frame for higher reliability — 40-ball FBGA package provides higher reliability-Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations — Separate VCCQ for 5 volt I/O tolerance n Automated Program and Erase — Page program: 512+ 16 bytes — Block erase: 8 K+ 256 bytes n Block architecture — 8 Kbyte blocks+ 256 byte spare area (separately erasable, readable, and programmable) — 512 byte page+ 16 byte spare area for ECC and other system overhead information n Fast read and program performance (typical values) — Read: < 7 μs initial, < 50 ns sequential — Program: 200 μs (full page program at 400 ns/byte) — Erase: < 2 ms/8 Kbyte block n Pinout and package — Industry Standard NAND compatible pinout with 8-bit I/O bus and control signals — TSOP-II 44/40 pin package (standard and reverse) with copper lead frame for higher reliability — 40-ball FBGA package provides higher reliability
Platform: | Size: 847872 | Author: enyou | Hits:

[SCM] Remoteprocedure1

Description: 本人用c语言编写了用tsop1738的接收程序，采用的时间中断-tsop1738
Platform: | Size: 1024 | Author: 蒲良舟 | Hits:

[Software Engineering] TSOP

Description: Photo Modules for PCM Remote Control Systems
Platform: | Size: 138240 | Author: Ram Kumar | Hits:

[SCM] ISD2560@

Description: 使用方便的单片 32 至 120 秒语音录放 􀂋 多段信息处理，可分 1 至 320/600 段 􀂋 高质量、自然的语音还原技术 􀂋 不耗电信息存 100 年（典型值） 􀂋 边沿/电平触发放音 􀂋 100，000 次录音周期（典型值） 􀂋 手动操作/微控制器控制兼容 􀂋 片内免调整时钟，可选外部时钟 􀂋 多片直接级联，延长录放时间 􀂋 无需开发系统 􀂋 5V 单电源工作，维持电流 1uA 􀂋 DIP，SOLC，TSOP 封装及工业级-Easy to use single-chip voice recorders 32-120 seconds 􀂋 multi-stage information processing, can be divided into paragraphs 1 to 320/600 􀂋 high-quality, natural voice to restore the power of information technology 􀂋 no deposit 100 years (typical) 􀂋 Edge/Level Trigger playback 􀂋 100,000 times recording cycles (typical) 􀂋 manual/micro controller chip is compatible with 􀂋 free to adjust the clock, optional external clock 􀂋 multi-chip direct cascade, without the need to extend the playback time 􀂋 Development System 􀂋 5V single-supply operation, maintaining current 1uA 􀂋 DIP, SOLC, TSOP packages and industrial grade
Platform: | Size: 86016 | Author: paradise | Hits:

[OS Develop] wjq

Description: TSOT：实验一 进程队列模拟，队列使用链表形式。 TSOP：实验二 页面请求模拟，生成表单一中的页面地址映射有严重问题，我没有重做。 TAOT：实验三 进程调度。 TAOB：实验四 银行家算法，不能自行设定进程数量，用的是递归算法。-TSOT: experimental simulation of a process queue, the queue using linked list form. TSOP: 2 page requests simulation experiment to generate the page address in the form of a mapping have serious problems, I did not redo. TAOT: Experiment 3 process scheduling. TAOB: Experiment 4 banker' s algorithm, not the number of self-setting process, using a recursive algorithm.
Platform: | Size: 36864 | Author: yaowenxue | Hits:

[CSharp] CY7C68013_FlashChipReader

Description: Full Project Flash NAND Chips (TSOP-48) Reader OrCAD schematic circuit + Protel Altium PCB Design + Windows API, basic on C# Host USB Application + uVision4 (Keil) CY7C68013 design.
Platform: | Size: 635904 | Author: pleishner | Hits:

[Other] LAPS

Description: LAPS协议：系统启动后，LAPS协议处理器发送端处于空闲状态，此时它可以向理想信元发送数据允许信号TENB。理想信源收到TENB有效信号，就开始发送数据，它发送的是长度在4－1544字节之间变化的数据包，在数据包的第一字节发送同时，送出数据包开始指示TSOP，在数据包的最后一个字节，发送数据包结束指示TEOP。在数据包的发送过程中，LAPS协议处理器可以随时通过TENB通知理想信源暂停数据发送，直到TENB有效，再继续发送。-LAPS protocol: the system starts, LAPS protocol processor, the transmitter is idle, then it can send data to the ideal cell to allow signal TENB. Ideal signal source receive TENB effective, they begin to send data, it sends the changes in length between 4-1544 bytes of data packets, the first byte in the packet sent at the same time, start sending data packets directed TSOP, In the last byte of the packet, send packet end instruction TEOP. In the process of sending packets, LAPS protocol processor can notice at any time by TENB the ideal source suspend sending data until TENB be effective, then continue to send.
Platform: | Size: 3072 | Author: gab | Hits:

[SCM] 01

Description: This source code for IR remote control with RC5 code. hex file working in AVR ATmega8 microcontroller with Crystal Oscillator 16Mhz. Infra red sensor (TSOP -1736) must connected to PORTD.2 (External Interrupt 0) of microcontroller.-This source code for IR remote control with RC5 code. hex file working in AVR ATmega8 microcontroller with Crystal Oscillator 16Mhz. Infra red sensor (TSOP -1736) must connected to PORTD.2 (External Interrupt 0) of microcontroller.
Platform: | Size: 26624 | Author: Lestat | Hits:

[Other Embeded program] ob

Description: obstacle avoiding using TSOP
Platform: | Size: 20480 | Author: mayur kulkarni | Hits:

[Software Engineering] tsop48d2_testhw

Description: SW 0.97ja , Test H/W. Adapter TSOP-48_D2, JpAA. EZoFlash+ 4v4, Jp2, Jp5 (3.3V mode)
Platform: | Size: 46080 | Author: ioneldolan | Hits:

[Software Engineering] IS42S16400D

Description: • Clock frequency: 166, 143 MHz • Fully synchronous all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single 3.3V power supply • LVTTL interface • Programmable burst length – (1, 2, 4, 8, full page) • Programmable burst sequence: Sequential/Interleave • Self refresh modes • 4096 refresh cycles every 64 ms • Random column address every clock cycle • Programmable CAS latency (2, 3 clocks) • Burst read/write and burst read/single write operations capability • Burst termination by burst stop and precharge command • Byte controlled by LDQM and UDQM • Industrial temperature availability • Package: 400-mil 54-pin TSOP II, 60-ball fBGA • Lead-free package is available-• Clock frequency: 166, 143 MHz • Fully synchronous all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single 3.3V power supply • LVTTL interface • Programmable burst length – (1, 2, 4, 8, full page) • Programmable burst sequence: Sequential/Interleave • Self refresh modes • 4096 refresh cycles every 64 ms • Random column address every clock cycle • Programmable CAS latency (2, 3 clocks) • Burst read/write and burst read/single write operations capability • Burst termination by burst stop and precharge command • Byte controlled by LDQM and UDQM • Industrial temperature availability • Package: 400-mil 54-pin TSOP II, 60-ball fBGA • Lead-free package is available
Platform: | Size: 521216 | Author: 徐文 | Hits:

[Other Embeded program] Easy_Control_TSOP_UniOut

Description: Simple sample of using avr controllers with 74hc595
Platform: | Size: 86016 | Author: Xeo | Hits:

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