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Description: usart的verilog代码.rar
包括很多的FPGA ip 源码,可以直接应用
uart_vhdl.zip
sl811usb包含源程序.rar
mc8051_design.zip
mcpu_1[1].05.zip
minicpu.zip
mmc_lark_original.zip
-USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
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Size: 5391360 |
Author: 钟阳 |
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Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
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Size: 1024 |
Author: Somasekhar |
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Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
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Size: 1024 |
Author: Somasekhar |
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Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
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Size: 1024 |
Author: Somasekhar |
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Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
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Size: 2048 |
Author: Somasekhar |
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Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
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Size: 1024 |
Author: Somasekhar |
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Description: Usart model in vhdl code
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Size: 6144 |
Author: gnomix |
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Description: usart modelling in vhdl for fpga users
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Size: 18432 |
Author: ali |
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Description: for tx in usart protocol.
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Size: 192512 |
Author: omid |
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