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[VHDL-FPGA-Verilogxapp514_aes3-audio

Description: DVB数字音频接口(AESEBU)encoder源码,包括VHDL和VERILOG,基于XILINX FPGA,已验证.-AES-EBU interface,VHDL,VERILOG
Platform: | Size: 4483072 | Author: dcshl | Hits:

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