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[Other resourcecodeofvhdl2006

Description: 【经典设计】VHDL源代码下载~~ 其中经典的设计有:【自动售货机】、【电子钟】、【红绿灯交通信号系统】、【步进电机定位控制系统】、【直流电机速度控制系统】、【计算器】、【点阵列LED显示控制系统】 基本数字逻辑设计有:【锁存器】、【多路选择器】、【三态门】、【双向输入|输出端口】、【内部(缓冲)信号】、【编码转换】、【加法器】、【编码器/译码器】、【4位乘法器】、【只读存储器】、【RSFF触发器】、【DFF触发器】、【JKFF触发器】、【计数器】、【分频器】、【寄存器】、【状态机】 - [ Classics design ] the VHDL source code downloads ~ ~ classics the design to include: [ Vending machine ], [ electron clock ], [ traffic light traffic signal system ], [ step of 杩涚數 machine localization control system ], [ direct current machine speed control system ], [ calculator ], [ array LED display control system ] the basic numeral logical design includes: [ Latch ], [ multichannel selector ], [ 涓夋
Platform: | Size: 44186 | Author: senkong | Hits:

[Othera VHDL Compiler

Description: 这是一个VHDL(硬件描述语言)的编译器,更确切说是一个解释器,输入是VHDL语言,输出是经过提到后的符号表,也就是将VHDL中的重要变量比如输入输出变量和DFF等保存下来。-This is a VHDL (hardware description language) compiler, more precise explanation is a device that is VHDL input, output was mentioned after the symbol table to VHDL is the important variables such as input and output variables and other DFF preserved.
Platform: | Size: 118091 | Author: gepo | Hits:

[Othera VHDL Compiler

Description: 这是一个VHDL(硬件描述语言)的编译器,更确切说是一个解释器,输入是VHDL语言,输出是经过提到后的符号表,也就是将VHDL中的重要变量比如输入输出变量和DFF等保存下来。-This is a VHDL (hardware description language) compiler, more precise explanation is a device that is VHDL input, output was mentioned after the symbol table to VHDL is the important variables such as input and output variables and other DFF preserved.
Platform: | Size: 117760 | Author: gepo | Hits:

[VHDL-FPGA-Verilogcodeofvhdl2006

Description: 【经典设计】VHDL源代码下载~~ 其中经典的设计有:【自动售货机】、【电子钟】、【红绿灯交通信号系统】、【步进电机定位控制系统】、【直流电机速度控制系统】、【计算器】、【点阵列LED显示控制系统】 基本数字逻辑设计有:【锁存器】、【多路选择器】、【三态门】、【双向输入|输出端口】、【内部(缓冲)信号】、【编码转换】、【加法器】、【编码器/译码器】、【4位乘法器】、【只读存储器】、【RSFF触发器】、【DFF触发器】、【JKFF触发器】、【计数器】、【分频器】、【寄存器】、【状态机】 - [ Classics design ] the VHDL source code downloads ~ ~ classics the design to include: [ Vending machine ], [ electron clock ], [ traffic light traffic signal system ], [ step of 杩涚數 machine localization control system ], [ direct current machine speed control system ], [ calculator ], [ array LED display control system ] the basic numeral logical design includes: [ Latch ], [ multichannel selector ], [ 涓夋
Platform: | Size: 44032 | Author: senkong | Hits:

[VHDL-FPGA-Verilogdff

Description: 用vhdl编写的D触发器,锁存器等,不需帐号就可自由下载此源码-VHDL prepared using D flip-flops, latches and so on, no account can be a free download this source
Platform: | Size: 1024 | Author: daniel | Hits:

[VHDL-FPGA-Verilogdff

Description: 关于DFF的FPGA实现,有VHDL源码-On the DFF of the FPGA implementation, there are VHDL source code
Platform: | Size: 115712 | Author: 123 | Hits:

[VHDL-FPGA-Verilogdff

Description: 用VHDL语言编写的带进位、置位、复位的D触发器,异步清零D触发器,同步清零D触发器-library ieee use ieee.std_logic_1164.all use ieee.std_logic_unsigned.all entity exp7_10 is port( clk: in std_logic d: in std_logic clr: in std_logic en,s:in std_logic q: out std_logic ) end exp7_10 architecture bhv of exp7_10 is signal q1: std_logic begin process(clk) begin if(clk event and clk= 1 ) then if(en= 1 ) then if(clr= 1 ) then q1<= 0 elsif(s= 1 ) then q1<= 1 else q1<=d end if end if end if end process q<=q1 end bhv
Platform: | Size: 1024 | Author: jly | Hits:

[VHDL-FPGA-Verilogd_ff

Description: 带置位、清零使能的D触发器以及同步清零D触发器、异步清零D触发器-VHDL,DFF
Platform: | Size: 1024 | Author: jly | Hits:

[VHDL-FPGA-VerilogDff

Description: D 触发器,数字电路中最基本的逻辑单元之一。很实用的程序例子-D flip-flop, one of the basic logics in the digital design, an instance of a Sequential VHDL codes
Platform: | Size: 1024 | Author: chenzhang | Hits:

[OS programDFF

Description: D触发器VHDL全代码,实验代码,已调试通过。D触发器VHDL全代码-D flip-flop full VHDL code, test code, debugging
Platform: | Size: 221184 | Author: cindy | Hits:

[VHDL-FPGA-VerilogDFF

Description: D flip-flpo design using VHDL codes
Platform: | Size: 122880 | Author: thapaji | Hits:

[VHDL-FPGA-VerilogDFF

Description: a vhdl source code for dff
Platform: | Size: 217088 | Author: maleki | Hits:

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