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[VHDL-FPGA-Verilogframe_decode_and_encode

Description: 一个用Verilog编写的编帧、解帧及码速匹配的程序,相当经典-Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!
Platform: | Size: 3072 | Author: 李全 | Hits:

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