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[Other] License

Description: 这是libero8.0软件的安装方法，及该软件的 license.ACTEL的FPGA的资料及软件的使用都非常少，故先传这个license-This is libero8.0 software installation methods, and the software license.ACTEL the FPGA information and software are very small, so the first mass of the license
Platform: | Size: 20480 | Author: 张全文 | Hits:

[VHDL-FPGA-Verilog] Libero8.0

Description: Libero8.0_教程,希望学习fpga的同学能够得到点帮助。-Libero8.0_ tutorial, I hope to learn the FPGA can be to help the students.
Platform: | Size: 3816448 | Author: 江鹏 | Hits:

[VHDL-FPGA-Verilog] uart8

Description: 使用Libero提供的异步通信IP核实现UART通信，并附带仿真程序。UART设置为1位开始位，8位数据位，1位停止位，无校验。且UART发送自带2级FIFO缓冲，占用FPGA面积很小。-Libero provided the use of asynchronous communication IP core implementation UART communications, and incidental simulation program. UART is set to 1 to start bit, 8 data bits, 1 stop bit, no parity. UART and send its own two FIFO buffer occupancy is very small FPGA.
Platform: | Size: 876544 | Author: 张键 | Hits:

[Com Port] Fusion_ABC_UART_2009_03_17

Description: Actel Fusion System Management Development Kit UART Example. Contains Libero design using CoreABC. Program prints text to UART.
Platform: | Size: 6999040 | Author: LoomVortex | Hits:

[Printing program] ACTEL_FUSION_ESIMERKKISOVELLUS_V4_FINAL_11_06_200

Description: Actel Fusion System Management Kit Example. Libero design for printing text to LCD.
Platform: | Size: 50856960 | Author: LoomVortex | Hits:

[VHDL-FPGA-Verilog] Libero8.5_UG

Description: Libero集成设计环境(IDE)8.5版本，这套完整的软件设计工具系列已进一步扩展，支持新近推出的nano版本IGLOO和ProASIC3现场可编程门阵列(FPGA)。-Libero Integrated Design Environment (IDE) 8.5 version, this complete series of software design tools have been further expanded to support the recently introduced nano versions of IGLOO and ProASIC3 field-programmable gate array (FPGA).
Platform: | Size: 2481152 | Author: 陈俊江 | Hits:

[VHDL-FPGA-Verilog] ESIMERKKISOVELLUS_V13

Description: Actel Fusion System Management Kit Libero Design for using I2C
Platform: | Size: 50159616 | Author: LoomVortex | Hits:

[VHDL-FPGA-Verilog] pa3_libguide_ug

Description: actel开发环境libero中应用到是一些基础宏的说明文档，很难得的资料-libero in actel application development environment are the basis of the documentation of the macro, it is difficult to get information
Platform: | Size: 949248 | Author: fu | Hits:

[VHDL-FPGA-Verilog] halfadder

Description: vhdl code for half adder using libero software
Platform: | Size: 1024 | Author: swap | Hits:

[VHDL-FPGA-Verilog] fulladder

Description: vhdl code for full adder program using libero software.
Platform: | Size: 1024 | Author: swap | Hits:

[VHDL-FPGA-Verilog] Libero

Description: libero 入门者的首选教材 actel fpga的入门教材 堪称经典 -libero material of choice for beginners actel fpga classic introductory textbook
Platform: | Size: 123904 | Author: xkdigital | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 用VHDL语言编程实现的FIFO的设计，可用于数据的寄存和缓冲，libero仿真通过-Programming language using the FIFO VHDL design can be used for data storage and buffering, libero simulation by
Platform: | Size: 1024 | Author: funny | Hits:

[VHDL-FPGA-Verilog] Libero_UG

Description: libero的使用详细教程，比较详细，比官网上给的教程详细的多-libero use of detailed tutorials, a more detailed tutorial than the official website for more details
Platform: | Size: 12322816 | Author: funny | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用VHDL语言编程实现UART，8位数据位，校验位自己可以加！LIBERO仿真正确！-VHDL language programming with UART, 8 data bits, parity bit that they can add! LIBERO simulation correctly!
Platform: | Size: 14336 | Author: funny | Hits:

[VHDL-FPGA-Verilog] CoreI2C

Description: 基于ACTEL公司Fusion系列芯片开发的嵌入式工程。实现了I2C功能，包括编写的Core。文件包括Libero开发的工程及Keil开发的工程。-Fusion Series ACTEL chip company based development of embedded projects. I2C capabilities realized, including the preparation of the Core. Documents include the development of engineering and Keil Libero development projects.
Platform: | Size: 5364736 | Author: 李寅鑫 | Hits:

[Other Embeded program] SD

Description: 基于ACTEL公司Fusion系列芯片开发的嵌入式工程。实现了SD卡读取功能，文件包括Libero开发的工程及Keil开发的工程。-Fusion Series ACTEL chip company based development of embedded projects. Achieved SD card reader function, the file including the Libero Keil development projects and the development of the project.
Platform: | Size: 4415488 | Author: 李寅鑫 | Hits:

[VHDL-FPGA-Verilog] LED

Description: FPGA程序 libero环境下运行 实验例程开发板LED灯轮流点亮，内附说明文档-FPGA programming environment to run experiments libero routine development board LED light is lit in turn, included documentation
Platform: | Size: 2556928 | Author: ddm | Hits:

[VHDL-FPGA-Verilog] FlashROM

Description: libero环境下FPGA中介绍ProASIC3/EFlash_ROM的仿真例程，-libero FPGA environment described ProASIC3/EFlash_ROM simulation routines,
Platform: | Size: 3561472 | Author: ddm | Hits:

[VHDL-FPGA-Verilog] Syn_FIFO

Description: 在libero环境下，FPGA如何使用ProASIC3/E的同步FIFO-In libero environment, FPGA using ProASIC3/E of the synchronous FIFO
Platform: | Size: 2819072 | Author: ddm | Hits:

[Other] Libero-SoC集成开发环境使用教程

Description: Libero-SoC集成开发环境使用教程(Libero-SoC integrated development environment use tutorial)
Platform: | Size: 7099392 | Author: cheerfang | Hits:
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