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[Embeded-SCM Develop] ref-ddr-sdram-verilog.zip

Description: sdram的verilog的源码实现
Platform: | Size: 903683 | Author: | Hits:

[Embeded-SCM Develop] ref-ddr-sdram-vhdl.zip

Description:
Platform: | Size: 1031343 | Author: | Hits:

[Embeded-SCM Develop] sdram_vhd_134.zip

Description: Xilinx Sdram控制器VHDL源代码
Platform: | Size: 54745 | Author: | Hits:

[Other resource] xst3_video

Description: xst3_video.ZIP是基于XILINX的XST3开发板的视频采集源码，里面有SDRAM control
Platform: | Size: 163540 | Author: 李斌 | Hits:

[VHDL-FPGA-Verilog] sdramcore

Description:
Platform: | Size: 19456 | Author: 韩 | Hits:

[Parallel Port] mt48lc2m32b2

Description: the verilog model of sdram-mt48lc2m32b2 device.-the verilog model of sdram- mt48lc2m32b2 d evice.
Platform: | Size: 6144 | Author: nightyboy | Hits:

[VHDL-FPGA-Verilog] sdram_verilog

Description: 这是使用VERILOG语言，基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic
Platform: | Size: 414720 | Author: | Hits:

[Other] xapp858[1]

Description: XAPP858 - 利用 Virtex-5 FPGA 实现的高性能 DDR2 SDRAM 接口数据采集 本应用指南描述了用于实现 667 Mbps（333 MHz）高性能 DDR2 SDRAM 接口的控制器和数据采集的技巧。 本数据采集技巧使用了输入串行器/解串器（ISERDES）和输出串行器/解串器（OSERDES）的功能。-XAPP858-use Virtex-5 FPGA high-performance DDR2 SDRA M Interface Data Acquisition Guide describes the application for achieving 667 Mbps (333 MHz) high-performance DDR 2 SDRAM Interface controller and data acquisition techniques. The data collection techniques used serial input/Solution Series (ISERDES) and serial output/Solution Series (O Legacy) function.
Platform: | Size: 296960 | Author: mingming | Hits:

[VHDL-FPGA-Verilog] xst3_video

Description: xst3_video.ZIP是基于XILINX的XST3开发板的视频采集源码，里面有SDRAM control-xst3_video.ZIP is based on the XILINX
Platform: | Size: 162816 | Author: 李斌 | Hits:

[Windows Develop] DDR_32Mx16_SimulationModel

Description: sdram的仿真模型，包括的多个不同的模型，用于仿真-SDRAM simulation model, including a number of different models for the simulation
Platform: | Size: 1873920 | Author: shroy | Hits:

[DVD] V7138_V1.0a.3_usb_copr_delete

Description: MTK DVD 1389L源代码，4×16 SDRAM，全功能。包括USB，读卡，GAME，卡拉OK，CD RIPPING，FILE COPY，FILE DELETE等。-MTK DVD 1389L source code, 4 × 16 SDRAM, full-featured. Including USB, card reader, GAME, karaoke OK, CD RIPPING, FILE COPY, FILE DELETE and so on.
Platform: | Size: 4677632 | Author: Allen | Hits:

[VHDL-FPGA-Verilog] DACtoADCtoSPI_Triangle1

Description: DACtoADCtoSPI_Triangle1.zip 一个项目工程，硬件包含Altera FPGA，SDRAM，串口，使用verilog-DACtoADCtoSPI_Triangle1.zip a project engineering, hardware contains Altera FPGA, SDRAM, serial port, using verilog
Platform: | Size: 121856 | Author: 李家发 | Hits:

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