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[Othersuperconductor

Description: 物理学程序,用C语言编写的源程序,是关于超导模型的。-Physics program, using C language source code, on the superconducting model.
Platform: | Size: 1024 | Author: 冉艳 | Hits:

[OtherchanglenggaoduVSzhouxiangli

Description: 关于超导体与永磁体之间的竖直悬浮力的计算程序-Calculation program on the vertical levitation force between a superconductor and a permanent magnet
Platform: | Size: 2048 | Author: meng dong | Hits:

[Software Engineeringgs010

Description: An Active Rectifier must be installed in a 60Hz 208V three-phase distribution system in order to provide a high power quality 600V DC supply for a 150kW motor drive. The active rectifier VSC and control is an American Superconductor (AMSC) PM-1000 Power Module with the Active Rectifier control option.
Platform: | Size: 17408 | Author: nima | Hits:

[matlabSSF-Superconductor

Description: SSF,分布傅里叶方法,在激光系统中的脉冲演化,包括五次方非线性-split step fourier method, it simulates a optical pulse evolution in the laser system
Platform: | Size: 1024 | Author: huppid huang | Hits:

[Software Engineering184081165-16-Bit-Wave-Pipelined-Sparse-Tree-RSFQ-

Description: In this system, we discuss the architecture, design, and testing of the first 16-bit asynchronous wave-pipelined sparse-tree superconductor rapid single flux quantum adder implemented using the ISTEC 10 kA/cm 2ADP2.1 fabrication process. Compared to the Kogge–Stone adder, our parallel-prefix sparse-tree adder has better energy efficiency with significantly reduced complexity (at the expense of latency) and almost no decrease in operation frequency. The 16-bit adder core (without SFQ-to-dc and dc-to-SFQ converters) has 9941 Josephson junctions occupying an area of 8.5 mm 2. It is designed for the target operation frequency of 30 GHz with the expected latency of 352 ps at the bias voltage of 2.5 mV. The adder chip was fabricated and successfully tested at low frequency for all test patterns with measured bias margins of +9.8 /− 10.7 .
Platform: | Size: 203776 | Author: Fardeen | Hits:

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