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[VHDL-FPGA-Verilogdff

Description: 用vhdl编写的D触发器,锁存器等,不需帐号就可自由下载此源码-VHDL prepared using D flip-flops, latches and so on, no account can be a free download this source
Platform: | Size: 1024 | Author: daniel | Hits:

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