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[Other resourceuart_transmitter

Description: Very good info. for RS-232 transmitter VHDL code .
Platform: | Size: 1154 | Author: wan mi | Hits:

[Other resourceuart_receiver

Description: Very good info. for RS-232 receive VHDL code .
Platform: | Size: 1440 | Author: wan mi | Hits:

[Other resourceECHO_DE2

Description: Very good info. for RS-232 echo VHDL code .
Platform: | Size: 2074 | Author: wan mi | Hits:

[VHDL-FPGA-VerilogRS232-for-vdhl

Description: RS232通讯VHDL源代码,MAXPLUS 2环境执行通过-RS232 communications VHDL source code, Segments 2 environment through implementation
Platform: | Size: 161792 | Author: lq | Hits:

[VHDL-FPGA-Verilogrs-5-3

Description: 学习使用FPGA做一些简单的编码器,RS(5,3)编码就是5个字符中有5-3=2两个校正字-Learning to use the FPGA to do a few simple encoders, RS (5,3) code is five characters in 5-3 = 2 has two correction words
Platform: | Size: 992256 | Author: rubyshirial | Hits:

[source in ebookRSencode

Description: 包含RS(10,8)的verilog源程序,加法器的verilog源程序,卷积码的verilog源程序-Contains RS (10,8) of the Verilog source code, the Verilog source code adder, convolution of the Verilog source code
Platform: | Size: 1024 | Author: bai | Hits:

[Windows DevelopMC-ACT-RSENC_DS

Description: MemecCoreReed-Solomon coding is a method of forward error correction in the form of block coding. Block coding consists of calculating a number of parity symbols over a number of message symbols. The parity symbols are appended to the end of the message symbols forming a codeword. Reed-Solomon coding is described in the form RS(n,k), where k is the number of message symbols in each block and n is the total number of symbols in the codeword. The value t defines the number of symbols that can be corrected by the Reed-Solomon code, where t=(n-k)/2 and the number of parity symbols is equal to 2t.
Platform: | Size: 95232 | Author: 张波 | Hits:

[VHDL-FPGA-Veriloguart_transmitter

Description: Very good info. for RS-232 transmitter VHDL code .
Platform: | Size: 1024 | Author: wan mi | Hits:

[VHDL-FPGA-Veriloguart_receiver

Description: Very good info. for RS-232 receive VHDL code .
Platform: | Size: 1024 | Author: wan mi | Hits:

[Communication-MobileRSencoder

Description: 关于rs码编码器的相关程序,利用硬件语言实现-Rs encoder code on the relevant procedures, take advantage of the hardware language
Platform: | Size: 5120 | Author: 庄镒鹏 | Hits:

[VHDL-FPGA-Verilogrs-codec-8-16

Description: RS[255,223]纠错码verilog源码,包含编码和解码模块,以及testbench等。-Verilog source code for RS[255,223] encoder and decoder, with testbench included.
Platform: | Size: 27648 | Author: 饶进平 | Hits:

[Streaming Mpeg4rs_encode

Description: 这是用verilog编写的RS(204,188)代码,适用于数字电视的BCH编码过程。-This is the verilog prepared using RS (204,188) code, the application of digital television in the course of the BCH code.
Platform: | Size: 2048 | Author: 蕊宫獍雪 | Hits:

[Communication-MobileRS_Verilog

Description: RS码的FPGA实现,verilog语言形式,好参考资料-FPGA realization of RS code, verilog language form, a good reference
Platform: | Size: 101376 | Author: 张洪 | Hits:

[VHDL-FPGA-VerilogRS485EN

Description: RS485的双向通信处,正在为此头疼的同学们可要注意了,这个可以解决你们双向通信过程中的很多问题哦-Two-way RS485 communications, the headache is to this end they' ll pay attention to the students, this two-way communication you can solve many problems in the course of oh
Platform: | Size: 151552 | Author: 江山 | Hits:

[SCMRSverilog

Description: RS译码主要模块的verilog代码,很有用也很实用的,需要的一定要看哦-RS decoding main modules of the verilog code, very useful and very useful, and we need to look at Oh sure
Platform: | Size: 9216 | Author: gx | Hits:

[VHDL-FPGA-VerilogRS-code

Description: 我测试过的!Verilog HDL实现RS编码。-I' ve tested it! RS coding Verilog HDL implementation.
Platform: | Size: 983040 | Author: kiekie | Hits:

[VHDL-FPGA-VerilogRS

Description: RS编码器的VHDL源程序,程序有点大,不过能用。-RS encoder VHDL source code, program a little big, but can be used.
Platform: | Size: 897024 | Author: lcz | Hits:

[Program docRS3123

Description: Reed- So lomon (RS) 码是一种重要的纠错码, 它对随机性和突发性错误有极强的纠错能力, 广泛应用于 数字视频广播(DVB) 系统和其它数字通信领域。给出了一种GF (25) 域上的RS (31, 23) 编码器的实现算法, 介绍 了用现场可编程门阵列(FPGA ) 实现RS 编码器的原理和过程, 并给出了实现电路及其仿真的输出波形。-Reed-So lomon (RS) code is an important error-correcting code, its random and unexpected error has a strong error correction capabilities, widely used in digital video broadcasting (DVB) systems and other digital communications. Gives a GF (25) Domains RS (31, 23) algorithm of the encoder is introduced with a Field Programmable Gate Array (FPGA) RS encoder to achieve the principles and processes, and providing a circuit and simulation of the output waveform.
Platform: | Size: 360448 | Author: 王彬 | Hits:

[VHDL-FPGA-Verilogworking_code

Description: rs 485 working code for project
Platform: | Size: 4096 | Author: sandhya | Hits:

[GPS developrs-code

Description: VHDL Code for D-Flip Flop & Matching Unit
Platform: | Size: 16384 | Author: Mohammed Ismail | Hits:
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