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[SourceCode] 原代码.rar

Description: 8051核的vhdl原代码。
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[Documents] Interoperability of Verilog VHDL Procedural Language Interfaces to.rar

Description: vhdl
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[Documents] verhdl95.rar

Description: vhdl
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[Documents] VHDL-Cookbook.rar

Description: vhdl
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[Applications] Silicon_Integrity，VHDL.rar

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[Embeded-SCM Develop] i2c总线的vhdl实现和vxworks的文件系统.rar

Description: i2c总线的vhdl实现和vxworks的文件系统
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[Embeded-SCM Develop] sdram_vhdl_lattice.rar

Description: lattice sdram 控制器VHDL源代码
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[Other] 基本语法：VHDL实例---条件赋值：使用多路选择器

Description: 基本语法：VHDL实例---条件赋值：使用多路选择器.rar-basic syntax : VHDL examples --- conditions assignment : use of multi-channel selector. Rar
Platform: | Size: 1957 | Author: 张洪 | Hits:

[Other resource] VHDL-vga_core(vhdl)

Description: VHDL-vga_core(vhdl).rar FPGA上实现 VGA的IP（VHDL）
Platform: | Size: 458838 | Author: nanotalk | Hits:

[Other] 基本语法：VHDL实例---条件赋值：使用多路选择器

Description: 基本语法：VHDL实例---条件赋值：使用多路选择器.rar-basic syntax : VHDL examples--- conditions assignment : use of multi-channel selector. Rar
Platform: | Size: 2048 | Author: 张洪 | Hits:

[VHDL-FPGA-Verilog] ps2_Code

Description: ps2接口编程实验，采用VHDL编程，用ISE开发工具-ps2 interface programming experiments using VHDL programming, development tools with ISE
Platform: | Size: 6144 | Author: 赵晗 | Hits:

Description: LED控制VHDL程序与仿真分别介绍采用FPGA对LED进行静态和动态显示的数字时钟控制程序-LED control procedures and VHDL simulation briefed on the use of FPGA LED static and dynamic significantly the figures show clock control procedures
Platform: | Size: 5120 | Author: 少龙 | Hits:

[Software Engineering] filter-vhdl-code

Description: filter-vhdl-code.rar为滤波器的完整VHDL程序，可用于IIR与FIR滤波器的仿真与验证实现，包括代码综合。使用版本为ISE6.3.-filter-vhdl-code.rar for the integrity of filter VHDL procedures, can be used for IIR and FIR filters realize simulation and verification, including an integrated code. Use version ISE6.3.
Platform: | Size: 173056 | Author: petri | Hits:

[VHDL-FPGA-Verilog] VHDL-vga_core(vhdl)

Description: VHDL-vga_core(vhdl).rar FPGA上实现 VGA的IP（VHDL）-VHDL-vga_core (vhdl). RarFPGA realize VGA on the IP (VHDL)
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[VHDL-FPGA-Verilog] ps2

Description: PS2接口的VHDL实现，希望对大家有帮助。-PS2 interface VHDL realize, in the hope that everyone has to help.
Platform: | Size: 7168 | Author: 张开文 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 采用VHDL语言设计一个4通道的数据采集控制模块。系统的功能描述如下： 1.系统主时钟为100 MHz。 2.数据为16位-数据线上连续2次00FF后数据传输开始。 3.系统内部总线宽度为8位。 4.共有4个通道（ch1、ch2、ch3、ch4），每个通道配备100 Bytes的RAM，当存满数据后停止数据采集并且相应通道的状态位产生报警信号。 5.数据分为8位串行输出，输出时钟由外部数据读取电路给出。 6.具备显示模块驱动功能。由SEL信号设置显示的通道，DISPLAY信号启动所选通道RAM中数值的显示过程。数值顺次显示一遍后显示结束，可以重新设定SEL的值选择下一个通道。模块数据线为8位，显示器件为4个8段LED。 7.数据采集模式如下：单通道采集（由SEL信号选择通道），多通道顺次采集（当前通道采满后转入下一通道），多通道并行采集（每通道依次采集一个数据）。模式由控制信号MODE选择，采集数据的总个数由NUM_COLLECT给出。 8.数据采集过程中不能读取，数据读取过程中不能采集-err
Platform: | Size: 5782528 | Author: pengfu | Hits:

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[SourceCode] 原代码.rar

[Documents] Interoperability of Verilog VHDL Procedural Language Interfaces to.rar

[Documents] verhdl95.rar

[Documents] VHDL-Cookbook.rar

[Applications] Silicon_Integrity，VHDL.rar

[Embeded-SCM Develop] i2c总线的vhdl实现和vxworks的文件系统.rar

[Embeded-SCM Develop] sdram_vhdl_lattice.rar

[Other] 基本语法：VHDL实例---条件赋值：使用多路选择器

[Other resource] VHDL-vga_core(vhdl)

[Other] 基本语法：VHDL实例---条件赋值：使用多路选择器

[VHDL-FPGA-Verilog] ps2_Code

[VHDL-FPGA-Verilog] LED.VHDL

[Software Engineering] filter-vhdl-code

[VHDL-FPGA-Verilog] VHDL-vga_core(vhdl)

[VHDL-FPGA-Verilog] ps2

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] ps2

[VHDL-FPGA-Verilog] Digital System Design with VHDL

[VHDL-FPGA-Verilog] VHDL 101 Everything you need to Know

[VHDL-FPGA-Verilog] The Designer's Guide to VHDL, Vol.3, Third Ed

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