FPGA-based table tennis game hardware circuit design and realization of a complete VHDL code. and a detailed account of how the PDF download and jumper settings and in a series of development platforms GW48 download debugging success!

Packet : 21840298fpga_tennis.rar filelist
实验10_2.pdf
EP1C3_10_2_TENNIS\BALL.VHD
EP1C3_10_2_TENNIS\BALLCTRL.VHD
EP1C3_10_2_TENNIS\BOARD.VHD
EP1C3_10_2_TENNIS\cmp_state.ini
EP1C3_10_2_TENNIS\COU10.VHD
EP1C3_10_2_TENNIS\COU4.VHD
EP1C3_10_2_TENNIS\MWAY.VHD
EP1C3_10_2_TENNIS\README\GW48使用readme.txt
EP1C3_10_2_TENNIS\README
EP1C3_10_2_TENNIS\SOUND.VHD
EP1C3_10_2_TENNIS\TENNIS.asm.rpt
EP1C3_10_2_TENNIS\TENNIS.CDF
EP1C3_10_2_TENNIS\TENNIS.done
EP1C3_10_2_TENNIS\TENNIS.fit.eqn
EP1C3_10_2_TENNIS\TENNIS.fit.rpt
EP1C3_10_2_TENNIS\TENNIS.fit.summary
EP1C3_10_2_TENNIS\TENNIS.flow.rpt
EP1C3_10_2_TENNIS\TENNIS.map.eqn
EP1C3_10_2_TENNIS\TENNIS.map.rpt
EP1C3_10_2_TENNIS\TENNIS.map.summary
EP1C3_10_2_TENNIS\TENNIS.PIN
EP1C3_10_2_TENNIS\TENNIS.QPF
EP1C3_10_2_TENNIS\TENNIS.QSF
EP1C3_10_2_TENNIS\TENNIS.QWS
EP1C3_10_2_TENNIS\TENNIS.SOF
EP1C3_10_2_TENNIS\TENNIS.tan.rpt
EP1C3_10_2_TENNIS\TENNIS.tan.summary
EP1C3_10_2_TENNIS\TENNIS.VHD
EP1C3_10_2_TENNIS

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