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- Update : 2008-10-13
- Size : 671.26kb
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- Author ：houlo******
- About ： houlongting
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ARM7 soft-core of the IP code, and research on the ARM and FPGA to do the development of great help!
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Packet : 55593400armcore.rar filelist ARMCORE\26_1000\Adder.v ARMCORE\26_1000\ALUComb.v ARMCORE\26_1000\ALUShell.v ARMCORE\26_1000\bak\Arbitrator.v ARMCORE\26_1000\bak\BusTransfer.v ARMCORE\26_1000\bak\CacheMemory.v ARMCORE\26_1000\bak\CAM.v ARMCORE\26_1000\bak\datac2.v ARMCORE\26_1000\bak\DataCacheController.v ARMCORE\26_1000\bak\DataCacheMemory.v ARMCORE\26_1000\bak\Def_ComponentEntry.v ARMCORE\26_1000\bak\InstructionCacheController.v ARMCORE\26_1000\bak\InstructionPreFetch.v ARMCORE\26_1000\bak\MemoryController.v ARMCORE\26_1000\bak\MemoryMux.v ARMCORE\26_1000\bak\nnARM.v ARMCORE\26_1000\bak\nnARM11.v ARMCORE\26_1000\bak\scr.cmd ARMCORE\26_1000\bak\System.v ARMCORE\26_1000\bak\tb_Adder.v ARMCORE\26_1000\bak\tb_BarrelShift.v ARMCORE\26_1000\bak\tb_complementary.v ARMCORE\26_1000\bak\tb_Decoder_ARM.v ARMCORE\26_1000\bak\tb_IF.v ARMCORE\26_1000\bak\tb_InstructionPreFetch.v ARMCORE\26_1000\bak\tb_RegisterFile.v ARMCORE\26_1000\bak\tb_system_fft.v ARMCORE\26_1000\bak\tb_tomasulo.v ARMCORE\26_1000\bak\TestInstruction.v ARMCORE\26_1000\bak ARMCORE\26_1000\BarrelShift.v ARMCORE\26_1000\CanGoGen.v ARMCORE\26_1000\complementary.v ARMCORE\26_1000\Decoder_ARM.v ARMCORE\26_1000\Def_ALUType.v ARMCORE\26_1000\Def_ARMALU.v ARMCORE\26_1000\Def_BarrelShift.v ARMCORE\26_1000\Def_ConditionField.v ARMCORE\26_1000\Def_DataCacheController.v ARMCORE\26_1000\Def_Decoder.v ARMCORE\26_1000\Def_Exception.v ARMCORE\26_1000\Def_InstructionCacheController.v ARMCORE\26_1000\Def_InstructionPreFetch.v ARMCORE\26_1000\Def_mem.v ARMCORE\26_1000\Def_MemoryController.v ARMCORE\26_1000\Def_Mode.v ARMCORE\26_1000\Def_psr.v ARMCORE\26_1000\Def_RegisterFile.v ARMCORE\26_1000\Def_SimulationParameter.v ARMCORE\26_1000\Def_StructureParameter.v ARMCORE\26_1000\D_Bus2Core.v ARMCORE\26_1000\IF.v ARMCORE\26_1000\InterruptPriority.v ARMCORE\26_1000\I_Bus2Core.v ARMCORE\26_1000\mem.v ARMCORE\26_1000\MemoryController_WB_Beh.v ARMCORE\26_1000\mul.v ARMCORE\26_1000\nnARM.prog ARMCORE\26_1000\nnARM.vpj ARMCORE\26_1000\nnARM1.v ARMCORE\26_1000\nnARMCore.v ARMCORE\26_1000\psr.v ARMCORE\26_1000\PSR_Fresh.v ARMCORE\26_1000\README.TXT ARMCORE\26_1000\RegisterFile.v ARMCORE\26_1000\scr.cmd ARMCORE\26_1000\scr1.cmd ARMCORE\26_1000\scr3.cmd ARMCORE\26_1000\tb_system.v ARMCORE\26_1000\ThumbDecoderWarper.v ARMCORE\26_1000\Thumb_2_nnARM.v ARMCORE\26_1000\timescalar.v ARMCORE\26_1000\transcript ARMCORE\26_1000\WishBone_Arbiter.v ARMCORE\26_1000\work\@a@l@u@comb\verilog.asm ARMCORE\26_1000\work\@a@l@u@comb\_primary.dat ARMCORE\26_1000\work\@a@l@u@comb\_primary.vhd ARMCORE\26_1000\work\@a@l@u@comb ARMCORE\26_1000\work\@a@l@u@shell\verilog.asm ARMCORE\26_1000\work\@a@l@u@shell\_primary.dat ARMCORE\26_1000\work\@a@l@u@shell\_primary.vhd ARMCORE\26_1000\work\@a@l@u@shell ARMCORE\26_1000\work\@barrel@shift\verilog.asm ARMCORE\26_1000\work\@barrel@shift\_primary.dat ARMCORE\26_1000\work\@barrel@shift\_primary.vhd ARMCORE\26_1000\work\@barrel@shift ARMCORE\26_1000\work\@can@go@gen\verilog.asm ARMCORE\26_1000\work\@can@go@gen\_primary.dat ARMCORE\26_1000\work\@can@go@gen\_primary.vhd ARMCORE\26_1000\work\@can@go@gen ARMCORE\26_1000\work\@decoder_@a@r@m\verilog.asm ARMCORE\26_1000\work\@decoder_@a@r@m\_primary.dat ARMCORE\26_1000\work\@decoder_@a@r@m\_primary.vhd ARMCORE\26_1000\work\@decoder_@a@r@m ARMCORE\26_1000\work\@d_@bus2@core\verilog.asm ARMCORE\26_1000\work\@d_@bus2@core\_primary.dat ARMCORE\26_1000\work\@d_@bus2@core\_primary.vhd ARMCORE\26_1000\work\@d_@bus2@core ARMCORE\26_1000\work\@i@f\verilog.asm ARMCORE\26_1000\work\@i@f\_primary.dat ARMCORE\26_1000\work\@i@f\_primary.vhd ARMCORE\26_1000\work\@i@f ARMCORE\26_1000\work\@interrupt@priority\verilog.asm ARMCORE\26_1000\work\@interrupt@priority\_primary.dat ARMCORE\26_1000\work\@interrupt@priority\_primary.vhd ARMCORE\26_1000\work\@interrupt@priority ARMCORE\26_1000\work\@i_@bus2@core\verilog.asm ARMCORE\26_1000\work\@i_@bus2@core\_primary.dat ARMCORE\26_1000\work\@i_@bus2@core\_primary.vhd ARMCORE\26_1000\work\@i_@bus2@core ARMCORE\26_1000\work\@m@e@m\verilog.asm ARMCORE\26_1000\work\@m@e@m\_primary.dat ARMCORE\26_1000\work\@m@e@m\_primary.vhd ARMCORE\26_1000\work\@m@e@m ARMCORE\26_1000\work\@memory@controller_@w@b_@bhv\verilog.asm ARMCORE\26_1000\work\@memory@controller_@w@b_@bhv\_primary.dat ARMCORE\26_1000\work\@memory@controller_@w@b_@bhv\_primary.vhd ARMCORE\26_1000\work\@memory@controller_@w@b_@bhv ARMCORE\26_1000\work\@p@s@r_@fresh\verilog.asm ARMCORE\26_1000\work\@p@s@r_@fresh\_primary.dat ARMCORE\26_1000\work\@p@s@r_@fresh\_primary.vhd ARMCORE\26_1000\work\@p@s@r_@fresh ARMCORE\26_1000\work\@register@file\verilog.asm ARMCORE\26_1000\work\@register@file\_primary.dat ARMCORE\26_1000\work\@register@file\_primary.vhd ARMCORE\26_1000\work\@register@file ARMCORE\26_1000\work\@status@registers\verilog.asm ARMCORE\26_1000\work\@status@registers\_primary.dat ARMCORE\26_1000\work\@status@registers\_primary.vhd ARMCORE\26_1000\work\@status@registers ARMCORE\26_1000\work\@thumb@decoder@warper\verilog.asm ARMCORE\26_1000\work\@thumb@decoder@warper\_primary.dat ARMCORE\26_1000\work\@thumb@decoder@warper\_primary.vhd ARMCORE\26_1000\work\@thumb@decoder@warper ARMCORE\26_1000\work\@wish@bone_@arbiter\verilog.asm ARMCORE\26_1000\work\@wish@bone_@arbiter\_primary.dat ARMCORE\26_1000\work\@wish@bone_@arbiter\_primary.vhd ARMCORE\26_1000\work\@wish@bone_@arbiter ARMCORE\26_1000\work\@word@adder\verilog.asm ARMCORE\26_1000\work\@word@adder\_primary.dat ARMCORE\26_1000\work\@word@adder\_primary.vhd ARMCORE\26_1000\work\@word@adder ARMCORE\26_1000\work\complementary\verilog.asm ARMCORE\26_1000\work\complementary\_primary.dat ARMCORE\26_1000\work\complementary\_primary.vhd ARMCORE\26_1000\work\complementary ARMCORE\26_1000\work\nn@a@r@m@core\verilog.asm ARMCORE\26_1000\work\nn@a@r@m@core\_primary.dat ARMCORE\26_1000\work\nn@a@r@m@core\_primary.vhd ARMCORE\26_1000\work\nn@a@r@m@core ARMCORE\26_1000\work\tb_system\verilog.asm ARMCORE\26_1000\work\tb_system\_primary.dat ARMCORE\26_1000\work\tb_system\_primary.vhd ARMCORE\26_1000\work\tb_system ARMCORE\26_1000\work\thumb_2_nnarm\verilog.asm ARMCORE\26_1000\work\thumb_2_nnarm\_primary.dat ARMCORE\26_1000\work\thumb_2_nnarm\_primary.vhd ARMCORE\26_1000\work\thumb_2_nnarm ARMCORE\26_1000\work\_info ARMCORE\26_1000\work ARMCORE\26_1000 ARMCORE\It_is_very_important.txt ARMCORE\modelfile\block\ASC ARMCORE\modelfile\block\block.JPG ARMCORE\modelfile\block\blocks.apj ARMCORE\modelfile\block\blocks.s ARMCORE\modelfile\block ARMCORE\modelfile\ldm\ASC ARMCORE\modelfile\ldm\Ldm.apj ARMCORE\modelfile\ldm\ldm.JPG ARMCORE\modelfile\ldm\ldm.s ARMCORE\modelfile\ldm\ldm_SDT.JPG ARMCORE\modelfile\ldm ARMCORE\modelfile\tblock\ASC ARMCORE\modelfile\tblock\tblock.apj ARMCORE\modelfile\tblock\tblock.JPG ARMCORE\modelfile\tblock\tblock.s ARMCORE\modelfile\tblock ARMCORE\modelfile ARMCORE\新建 文本文档.txt ARMCORE
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