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Title:
vhdl_sw_lr
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Category:
VHDL-FPGA-Verilog
Tags:
File Size:
15.99kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
wangshiyao1984
Description:
I wrote it myself vhdl procedures, which are drawing device, and control of ram ram. There bentch test.
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