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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2012-11-26
- Size : 1kb
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- Author ：wang****
- About ： Nobody
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Introduction - If you have any usage issues, please Google them yourself
SERDES function, the use of language VERILOG, including the test documents to share with you, for your information
Packet file list
(Preview for download)
s2p
...\s2p.v
...\testbenchs2p.v
...\s2p.v
...\testbenchs2p.v
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