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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2012-11-26
- Size : 1kb
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- Author ：ven****
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VHDL code in ISE (for collecting the ADC samples from kit and for viewing
final output)
Packet file list
(Preview for download)
VHDL code in ISE (for collecting the ADC samples from kit and for viewing.txt
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