VHDL language and application programming source code. Including the contents of Chapter 2-12. There are a practical example: the design of digital code detonator.

VHDL\Chapter10\example10-1\basic_dff.vhd
....\.........\...........0\registern.vhd
....\.........\...........1\shift_regn.vhd
....\.........\...........2\shift_reg.vhd
....\.........\...........3\shift_regn.vhd
....\.........\...........4\shift_regn.vhd
....\.........\...........5\counter.vhd
....\.........\...........6\countern.vhd
....\.........\...........7\countern.vhd
....\.........\...........8\async_counter.vhd
....\.........\..........2\sync_rdff.vhd
....\.........\..........3\async_rdff.vhd
....\.........\..........4\sync_rsdff.vhd
....\.........\..........5\async_rsdff.vhd
....\.........\..........6\async_rsjkff.vhd
....\.........\..........7\tff.vhd
....\.........\..........8\latch_74ls373.vhd
....\.........\..........9\reg_74ls374.vhd
....\........1\example11-1\store_controller.vhd
....\.........\...........0\store_controller.vhd
....\.........\...........1\store_controller.vhd
....\.........\..........2\store_controller.vhd
....\.........\..........3\store_controller.vhd
....\.........\..........4\store_controller.vhd
....\.........\..........5\store_controller.vhd
....\.........\..........6\store_controller.vhd
....\.........\..........7\store_controller.vhd
....\.........\..........8\store_controller.vhd
....\.........\..........9\store_controller.vhd
....\........2\example12-1&2\fire_d.vhd
....\.........\...........0\kcoun102.vhd
....\.........\...........1\kcoun10.vhd
....\.........\...........2\kcoun20.vhd
....\.........\...........3\se7.vhd
....\.........\...........4\kinvert.vhd
....\.........\...........5\control.vhd
....\.........\..........3\ksy.vhd
....\.........\..........4\kbian.vhd
....\.........\..........5\kcom.vhd
....\.........\..........6\k4mux.vhd
....\.........\..........7\kcount.vhd
....\.........\..........8\kf_f.vhd
....\.........\..........9\kcoun101.vhd
....\.......2\example2-1\and_gate.vhd
....\.......3\example3-1\counter.vhd
....\........\.........2\and_gate.vhd
....\........\.........3\and_gate4.vhd
....\........\.........4\adder.vhd
....\........\.........5\full_adder.vhd
....\........\.........6\full_adder.vhd
....\........\.........7\half_adder.vhd
....\........\.........8\full_adder.vhd
....\.......4\example4-1\mux2.vhd
....\........\..........0\vector_to_int.vhd
....\........\..........1\example.vhd
....\........\..........2\comparison.vhd
....\........\..........3\example.vhd
....\........\..........4\max.vhd
....\........\..........5\example.vhd
....\........\..........6\max.vhd
....\........\..........7\example.vhd
....\........\.........2\dff.vhd
....\........\.........3\full_adder.vhd
....\........\.........4\cpu.vhd
....\........\.........5\dff.vhd
....\........\.........6\sync_communication.vhd
....\........\.........7\vector_to_int.vhd
....\........\.........8\example.vhd
....\........\.........9\convert.vhd
....\.......5\example5-1\bus_and.vhd
....\........\..........0\mux4.vhd
....\........\..........1\mux4.vhd
....\........\..........2\vector_to_int.vhd
....\........\..........3\logic_and.vhd
....\........\..........4\logic_and.vhd
....\........\..........5\maximum.vhd
....\........\..........6\mux4.vhd
....\........\..........7\rsff.vhd
....\........\.........2\bus_and.vhd
....\........\.........3\reset_dff1.vhd
....\........\.........4\reset_dff2.vhd
....\........\.........5\clk_generator.vhd
....\........\.........6\example.vhd
....\........\.........7\example.vhd
....\........\.........8\adder.vhd
....\........\.........9\mux2.vhd
....\.......6\example6-1\gate_circuits.vhd
....\........\..........0\example.vhd
....\........\..........1\shift_reg.vhd
....\........\..........2\shift_reg.vhd
....\........\..........3\shift_reg.vhd
....\........\.........2\gate_circuits.vhd
....\........\.........3\and_gate.vhd
....\........\.........4\and_gate.vhd
....\........\.........5\mux4.vhd
....\........\.........6\example.vhd
....\........\.........7\example.vhd
....\........\.........8\and_gate.vhd
....\........\.........9\example.vhd
....\.......7\example7-1\vector_to_int.vhd

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