Lab edk with board spartan3an

lab3_an\bitinit.log
.......\.lockdiagram\.dswkshop\MdtSvgBLKD_Dimensions.xsl
.......\............\.........\MdtSvgDiag_Colors.xsl
.......\............\.........\MdtSvgDiag_Globals.xsl
.......\............\.........\MdtSvgDiag_StyleDefs.css
.......\............\.........\MdtTinySvgBLKD_BusLaneSpaces.xsl
.......\............\.........\MdtTinySvgBLKD_Busses.xsl
.......\............\.........\MdtTinySvgBLKD_Functions.xsl
.......\............\.........\MdtTinySvgBLKD_Globals.xsl
.......\............\.........\MdtTinySvgBLKD_IOPorts.xsl
.......\............\.........\MdtTinySvgBLKD_Main.xsl
.......\............\.........\MdtTinySvgBLKD_Peripherals.xsl
.......\............\.........\MdtTinySvgBLKD_Processors.xsl
.......\............\.........\MdtTinySvgBLKD_StyleDefs.xsl
.......\............\.........\MdtTinySvgDiag_BifShapes.xsl
.......\............\.........\MdtXdsGen_Colors.xsl
.......\............\.........\MdtXdsGen_Globals.xsl
.......\............\.........\MdtXdsGen_HTMLDatasheet.css
.......\............\.........\MdtXdsGen_HTMLDatasheet.xsl
.......\............\.........\MdtXdsGen_HTMLIPSection.xsl
.......\............\.........\MdtXdsGen_HTMLMemoryMap.xsl
.......\............\.........\MdtXdsGen_HTMLTOCTree.xsl
.......\............\.........\svg10.dtd
.......\............\.........\system_w_blkd.xml
.......\............\svg10.dtd
.......\............\system.css
.......\............\system.svg
.......\clock_generator_0.log
.......\data\system.ucf
.......\.rivers\lcd_ip_v1_00_a\data\lcd_ip_v2_1_0.mdd
.......\.......\..............\....\lcd_ip_v2_1_0.tcl
.......\.......\..............\src\lcd_ip.c
.......\.......\..............\...\lcd_ip.h
.......\.......\..............\...\lcd_ip_selftest.c
.......\.......\..............\...\Makefile
.......\etc\bitgen.ut
.......\...\download.cmd
.......\...\fast_runtime.opt
.......\hdl\btns_4bit_wrapper.vhd
.......\...\clock_generator_0_wrapper.vhd
.......\...\dips_4bit_wrapper.vhd
.......\...\dlmb_cntlr_wrapper.vhd
.......\...\dlmb_wrapper.vhd
.......\...\elaborate\lmb_bram_elaborate_v1_00_a\hdl\vhdl\lmb_bram_elaborate.vhd
.......\...\ilmb_cntlr_wrapper.vhd
.......\...\ilmb_wrapper.vhd
.......\...\lcd_ip_0_wrapper.vhd
.......\...\leds_8bit_wrapper.vhd
.......\...\lmb_bram_wrapper.vhd
.......\...\mb_plb_wrapper.vhd
.......\...\mdm_0_wrapper.vhd
.......\...\microblaze_0_wrapper.vhd
.......\...\proc_sys_reset_0_wrapper.vhd
.......\...\rs232_dce_wrapper.vhd
.......\...\system.vhd
.......\...\system_stub.vhd
.......\implementation\bitgen.ut
.......\..............\btns_4bit_wrapper.ngc
.......\..............\btns_4bit_wrapper.ngc_xst.xrpt
.......\..............\btns_4bit_wrapper_vhdl.prj
.......\..............\cache\btns_4bit_wrapper.ngc
.......\..............\.....\cache.cat
.......\..............\.....\clock_generator_0_wrapper.ngc
.......\..............\.....\dips_4bit_wrapper.ngc
.......\..............\.....\dlmb_cntlr_wrapper.ngc
.......\..............\.....\dlmb_wrapper.ngc
.......\..............\.....\ilmb_cntlr_wrapper.ngc
.......\..............\.....\ilmb_wrapper.ngc
.......\..............\.....\lcd_ip_0_wrapper.ngc
.......\..............\.....\leds_8bit_wrapper.ngc
.......\..............\.....\lmb_bram_wrapper.ngc
.......\..............\.....\mb_plb_wrapper.ngc
.......\..............\.....\mdm_0_wrapper.ngc
.......\..............\.....\microblaze_0_wrapper.ngc
.......\..............\.....\proc_sys_reset_0_wrapper.ngc
.......\..............\.....\rs232_dce_wrapper.ngc
.......\..............\clock_generator_0_wrapper.ngc
.......\..............\clock_generator_0_wrapper.ngc_xst.xrpt
.......\..............\clock_generator_0_wrapper_vhdl.prj
.......\..............\dips_4bit_wrapper.ngc
.......\..............\dips_4bit_wrapper.ngc_xst.xrpt
.......\..............\dips_4bit_wrapper_vhdl.prj
.......\..............\dlmb_cntlr_wrapper.ngc
.......\..............\dlmb_cntlr_wrapper.ngc_xst.xrpt
.......\..............\dlmb_cntlr_wrapper_vhdl.prj
.......\..............\dlmb_wrapper.ngc
.......\..............\dlmb_wrapper.ngc_xst.xrpt
.......\..............\dlmb_wrapper_vhdl.prj
.......\.........

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