4 automatic transmission design a digital frequency meter, by a 4 decimal digital tube (including the decimal point) shows the results 2, the measuring range 1Hz ~ 9999KHz 3, can automatically according to seven decimal results, automatically select valid data dynamic display of high 4 (ie, automatic range conversion), the decimal point that is 1000, which KHz 4, for the detection of design right or not, should be through the PLL and clock dividers generate wide range of manual multiple frequency Test automatic transmission frequency counter function.

zidongpinlv\Count.bsf
...........\Count.vhd
...........\Count.vhd.bak
...........\count.vwf
...........\Count1.bsf
...........\Count1.vhd
...........\Count1.vhd.bak
...........\Count2.vhd
...........\db\prev_cmp_zidongpinlv.asm.qmsg
...........\..\prev_cmp_zidongpinlv.fit.qmsg
...........\..\prev_cmp_zidongpinlv.map.qmsg
...........\..\prev_cmp_zidongpinlv.qmsg
...........\..\prev_cmp_zidongpinlv.sim.qmsg
...........\..\prev_cmp_zidongpinlv.tan.qmsg
...........\..\wed.wsf
...........\..\zidongpinlv.asm.qmsg
...........\..\zidongpinlv.asm_labs.ddb
...........\..\zidongpinlv.cbx.xml
...........\..\zidongpinlv.cmp.bpm
...........\..\zidongpinlv.cmp.cdb
...........\..\zidongpinlv.cmp.ecobp
...........\..\zidongpinlv.cmp.hdb
...........\..\zidongpinlv.cmp.logdb
...........\..\zidongpinlv.cmp.rdb
...........\..\zidongpinlv.cmp.tdb
...........\..\zidongpinlv.cmp0.ddb
...........\..\zidongpinlv.db_info
...........\..\zidongpinlv.eco.cdb
...........\..\zidongpinlv.eds_overflow
...........\..\zidongpinlv.fit.qmsg
...........\..\zidongpinlv.hier_info
...........\..\zidongpinlv.hif
...........\..\zidongpinlv.map.bpm
...........\..\zidongpinlv.map.cdb
...........\..\zidongpinlv.map.ecobp
...........\..\zidongpinlv.map.hdb
...........\..\zidongpinlv.map.logdb
...........\..\zidongpinlv.map.qmsg
...........\..\zidongpinlv.map_bb.cdb
...........\..\zidongpinlv.map_bb.hdb
...........\..\zidongpinlv.map_bb.hdbx
...........\..\zidongpinlv.map_bb.logdb
...........\..\zidongpinlv.pre_map.cdb
...........\..\zidongpinlv.pre_map.hdb
...........\..\zidongpinlv.psp
...........\..\zidongpinlv.root_partition.cmp.atm
...........\..\zidongpinlv.root_partition.cmp.dfp
...........\..\zidongpinlv.root_partition.cmp.hdbx
...........\..\zidongpinlv.root_partition.cmp.logdb
...........\..\zidongpinlv.root_partition.cmp.rcf
...........\..\zidongpinlv.root_partition.map.atm
...........\..\zidongpinlv.root_partition.map.hdbx
...........\..\zidongpinlv.root_partition.map.info
...........\..\zidongpinlv.rtlv.hdb
...........\..\zidongpinlv.rtlv_sg.cdb
...........\..\zidongpinlv.rtlv_sg_swap.cdb
...........\..\zidongpinlv.sgdiff.cdb
...........\..\zidongpinlv.sgdiff.hdb
...........\..\zidongpinlv.signalprobe.cdb
...........\..\zidongpinlv.sim.cvwf
...........\..\zidongpinlv.sim.hdb
...........\..\zidongpinlv.sim.qmsg
...........\..\zidongpinlv.sim.rdb
...........\..\zidongpinlv.sld_design_entry.sci
...........\..\zidongpinlv.sld_design_entry_dsc.sci
...........\..\zidongpinlv.syn_hier_info
...........\..\zidongpinlv.tan.qmsg
...........\..\zidongpinlv.tis_db_list.ddb
...........\Dplay.bsf
...........\Dplay.vhd
...........\Dplay.vhd.bak
...........\DS.vhd
...........\multifre.bsf
...........\multifre.vhd
...........\multifre.vhd.bak
...........\ScaleState.bsf
...........\ScaleState.vhd
...........\ScaleState.vhd.bak
...........\ScaleState.vwf
...........\ScaleTran.vhd
...........\SignalLatch.bsf
...........\SignalLatch.vhd
...........\zidongpinlv.asm.rpt
...........\zidongpinlv.bdf
...........\zidongpinlv.done
...........\zidongpinlv.fit.rpt
...........\zidongpinlv.fit.smsg
...........\zidongpinlv.fit.summary
...........\zidongpinlv.flow.rpt
...........\zidongpinlv.map.rpt
...........\zidongpinlv.map.summary
...........\zidongpinlv.pin
...........\zidongpinlv.pof
...........\zidongpinlv.qpf
...........\zidongpinlv.qsf
...........\zidongpinlv.qws
...........\zidongpinlv.sim.rpt
...........\zidongpinlv.sof
...........\zidongpinlv.tan.rpt
...........\zidongpinlv.tan.summary

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