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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2012-11-26
- Size : 24kb
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- Author ：王****
- About ： Nobody
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Introduction - If you have any usage issues, please Google them yourself
Using IP core to complete 2X16 character LCD screen access. By writing the command to control where the data write line by writing the data, output data displayed on the LCD screen.
Packet file list
(Preview for download)
[5]SummaryInformation
WordDocument
1Table
[1]CompObj
[5]DocumentSummaryInformation
WordDocument
1Table
[1]CompObj
[5]DocumentSummaryInformation
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