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FPGA_LCD

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 1.16mb
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  • Author :duanh******
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Introduction - If you have any usage issues, please Google them yourself
FPGA implementation using simple characters in the LCD1602 display the test program code
Packet file list
(Preview for download)
FPGA_LCD\LCD_Controller_Altera_MAX_II_CPLD_Design_Exampler\code\lcd_controller.v
........\.................................................\modelsim\lcd_controller.cr.mti
........\.................................................\........\lcd_controller.mpf
........\.................................................\........\lcd_controller.v
........\.................................................\........\lcd_testbench.v
........\.................................................\........\transcript
........\.................................................\........\vsim.wlf
........\.................................................\........\wave.bmp
........\.................................................\........\wave.do
........\.................................................\........\.ork\@u@f@m2\verilog.psm
........\.................................................\........\....\.......\_primary.dat
........\.................................................\........\....\.......\_primary.vhd
........\.................................................\........\....\......._altufm_parallel_bmm\verilog.psm
........\.................................................\........\....\...........................\_primary.dat
........\.................................................\........\....\...........................\_primary.vhd
........\.................................................\........\....\divider\verilog.psm
........\.................................................\........\....\.......\_primary.dat
........\.................................................\........\....\.......\_primary.vhd
........\.................................................\........\....\fsm\verilog.psm
........\.................................................\........\....\...\_primary.dat
........\.................................................\........\....\...\_primary.vhd
........\.................................................\........\....\lcd_controller\verilog.psm
........\.................................................\........\....\..............\_primary.dat
........\.................................................\........\....\..............\_primary.vhd
........\.................................................\........\....\....testbench\verilog.psm
........\.................................................\........\....\.............\_primary.dat
........\.................................................\........\....\.............\_primary.vhd
........\.................................................\........\....\_info
........\.................................................\quartus\db\lcd_controller.asm.qmsg
........\.................................................\.......\..\lcd_controller.asm_labs.ddb
........\.................................................\.......\..\lcd_controller.cbx.xml
........\.................................................\.......\..\lcd_controller.cmp.cdb
........\.................................................\.......\..\lcd_controller.cmp.hdb
........\.................................................\.......\..\lcd_controller.cmp.logdb
........\.................................................\.......\..\lcd_controller.cmp.rdb
........\.................................................\.......\..\lcd_controller.cmp.tdb
........\.................................................\.......\..\lcd_controller.cmp0.ddb
........\.................................................\.......\..\lcd_controller.dbp
........\.................................................\.......\..\lcd_controller.db_info
........\.................................................\.......\..\lcd_controller.eco.cdb
........\.................................................\.......\..\lcd_controller.fit.qmsg
........\.................................................\.......\..\lcd_controller.hier_info
........\.................................................\.......\..\lcd_controller.hif
........\.................................................\.......\..\lcd_controller.map.cdb
........\.......
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