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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2012-11-26
- Size : 29kb
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- Author ：a*****
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Introduction - If you have any usage issues, please Google them yourself
6805 compatible CPU Core
6805 compatible core
- 4 x 8 bit Parallel I/O ports
- Dual 8 bit Timer
- MiniUART compatible with 6850 ACIA.
- Runs with an E clock of 12.5MHz and system clock of 25MHz
Packet file list
(Preview for download)
46383150system05_latest.tar
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