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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2012-11-26
- Size : 813kb
- Downloaded ：0次
- Author ：Dan***
- About ： Nobody
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Introduction - If you have any usage issues, please Google them yourself
mini_uart- transmitter, receiver and a baud.
Packet file list
(Preview for download)
muart\BRG.vhd
.....\decod.vhd
.....\documentation.pdf
.....\main.ucf
.....\main.vhd
.....\serial.VHD
.....\tbw.vhw
.....\web_uploads\MUART.tar
.....\web_uploads
muart
.....\decod.vhd
.....\documentation.pdf
.....\main.ucf
.....\main.vhd
.....\serial.VHD
.....\tbw.vhw
.....\web_uploads\MUART.tar
.....\web_uploads
muart
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