this program is writen by verilog HDL.it is for spi communicate in FPGA

ep2c35_4_11_spi_send\spi_send.qpf
....................\spi_send.qsf
....................\spi_send.map.summary
....................\spi_send.done
....................\spi_send.pin
....................\spi_send.fit.smsg
....................\spi_send.fit.summary
....................\spi_send.sof
....................\spi_send.pof
....................\spi_send.tan.summary
....................\spi_send.cdf
....................\prev_cmp_spi_send.qmsg
....................\spi_send.map.rpt
....................\spi_send.fit.rpt
....................\spi_send.asm.rpt
....................\spi_send.tan.rpt
....................\spi_send.flow.rpt
....................\spi_send.v.bak
....................\spi_send.v
....................\spi_send.qws
ep2c35_4_11_spi_send

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