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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2012-11-26
- Size : 3kb
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- Author ：va***
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Introduction - If you have any usage issues, please Google them yourself
this is crosstalk avoidance ieee 2009 code this contains binary code to fibonacci conversion code in encoder and fibonacci to binary conversion using states in decoder.
Packet file list
(Preview for download)
enc_func.vhd
CAC_DEC.vhd
CAC_DEC.vhd
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