Introduction - If you have any usage issues, please Google them yourself
The goal is to use the FPGA logic resources, programming design realize a serial general asynchronous transceiver. The experiment device for "innovation comprehensive experimental platform" on integrated Altera NIOSII development board, FPGA the chip for EP1C12F324C8. Circuit design by VHDL language programming realize hardware description, the development of software for the QuartusII6.0.