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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2012-11-26
- Size : 8kb
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- Author ：f****
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Introduction - If you have any usage issues, please Google them yourself
Serial Peripheral Interface (SPI), The fpga passive receiving, at the falling edge of data collection the send data 1BYTE, mcu data collected at the end. And the data ready before the falling edge.
Packet file list
(Preview for download)
FPGA实现SPI.doc
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