FPGA can recover burst 100MHz data based on over sampling

DataRecovery\AfterNRZDecode.v
............\cod_4b5b_summary.html
............\Data Recovery\xapp224\basic\virtex2\verilog\design_files\data_recovery_virtex2.v
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............\.............\.......\.....\.......\.......\simulation\tb_top_v2.v
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............\.............\.......\.....\.......\.hdl\design_files\data_recovery_virtex2.vhd
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............\.............\.......\.....\.......\....\simulation\tb_top_v2.VHD
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............\.............\.......\.....\.......\....\ucf\TOP_V2.UCF
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............\.............\.......\.....\......E\verilog\design_files\data_recovery_virtexe.v
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............\.............\.......\.....\.......\.......\ucf\TOP_VE.UCF
............\.............\.......\.....\.......\.hdl\design_files\data_recovery_virtexe.vhd
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............\.............\.......\.....\.......\....\simulation\tb_top_ve.vhd
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............\.............\.......\.....\.......\....\ucf\TOP_VE.UCF
............\.............\.......\demo_board\virtex2\vhdl\design_files\data_recovery_virtex2.vhd
............\.............\.......\..........\.......\....\............\data_recovery_virtex2_fast.vhd
............\.............\.......\..........\.......\....\............\pn23.vhd
............\.............\.......\..........\.......\....\............\top.vhd
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............\.............\.......\..........\.......\....\simulation\tb_top.VHD
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............\.............\.......\..........\.......\....\..........\top.do
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............\.............\.......\..........\.......\....\ucf\top.UCF
............\.............\.......\..........\.......\....\...\top_fast.ucf
............\.............\.......\README.txt
............\Data Recovery.pdf
............\DataRecovery.v
............\DCMClk.v
............\DCMClk.xaw
............\DCMClk_arwz.ucf
............\Decode4B5B.v
............\Encode4B5B.v
............\FIFOAfterStoP.asy
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............\FIFOAfterStoP.xco
............\FIFOAfterStoP_fifo_generator_v4_4_xst_1.ngc_xst.xrpt
............\FIFOAfterStoP_flist.txt
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