Introduction - If you have any usage issues, please Google them yourself
This example shows how to configure the SysTick to generate a time base equal to
1 ms. The system clock is set to 24 MHz on Value line devices and to 72 MHz on
other devices, the SysTick is clocked by the AHB clock (HCLK).
A "Delay" function is implemented based on the SysTick end-of-count event.
Four LEDs are toggled with a timing defined by the Delay function.