3/8 decoder decodes input: A, B, and C, the input signal: EN en normal input signal is high, when EN is low, whether A, B, C why the input signal value, the output Y0 ... Y7 are high " 1." Circuit logic functions, the logic functions to be downloaded to the FPGA. Note options: the input signal line 4, the output line 8 (connected to the light emitting diodes LEDs) when tested according to the changes in the input signal to observe the output signal changes.

coder3_8\coder3_8.asm.rpt
........\coder3_8.cdf
........\coder3_8.done
........\coder3_8.dpf
........\coder3_8.fit.rpt
........\coder3_8.fit.summary
........\coder3_8.flow.rpt
........\coder3_8.map.rpt
........\coder3_8.map.summary
........\coder3_8.pin
........\coder3_8.pof
........\coder3_8.qpf
........\coder3_8.qsf
........\coder3_8.qws
........\coder3_8.sim.rpt
........\coder3_8.sof
........\coder3_8.tan.rpt
........\coder3_8.tan.summary
........\coder3_8.vwf
........\coder3_8_assignment_defaults.qdf
........\db\coder3_8.db_info
........\..\coder3_8.eco.cdb
........\..\coder3_8.sim.cvwf
........\..\coder3_8.sld_design_entry.sci
........\..\mux_bmc.tdf
........\..\prev_cmp_coder3_8.asm.qmsg
........\..\prev_cmp_coder3_8.fit.qmsg
........\..\prev_cmp_coder3_8.map.qmsg
........\..\prev_cmp_coder3_8.qmsg
........\..\prev_cmp_coder3_8.sim.qmsg
........\..\prev_cmp_coder3_8.tan.qmsg
........\..\wed.wsf
........\decoder3_8.v
........\decoder3_8.v.bak
........\db
coder3_8

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