Divide using FPGA realize DDS frequency module

dds\cmp_state.ini
...\db\dds.db_info
...\..\dds.eco.cdb
...\..\dds.sld_design_entry.sci
...\dds.asm.rpt
...\dds.bsf
...\dds.cdf
...\dds.done
...\dds.fit.eqn
...\dds.fit.rpt
...\dds.fit.summary
...\dds.flow.rpt
...\dds.map.eqn
...\dds.map.rpt
...\dds.map.summary
...\dds.pin
...\dds.pof
...\dds.ppl
...\dds.qpf
...\dds.qsf
...\dds.qws
...\dds.sof
...\dds.tan.rpt
...\dds.tan.summary
...\dds.v
...\dds.vhd
...\dds.vhd.bak
...\dds_assignment_defaults.qdf
...\dds_rom.bsf
...\dds_rom.mif
...\dds_rom.v
...\dds_rom.vhd
...\dds_rom_inst.v
...\dds_rom_inst.vhd
...\dds_test.bsf
...\dds_test.v
...\dds_test.vhd
...\dds_test.vhd.bak
...\dds_top.v
...\dds_top.vhd
...\dds_top.vhd.bak
...\pll.bsf
...\pll.v
...\pll.vhd
...\pll_inst.v
...\pll_inst.vhd
...\serv_req_info.txt
...\_desktop.ini
...\db
dds
项目1.rar

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