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Title: monitoringV5 Download
 Description: Document is based on Xilinx ISE FPGA wrote, the use of development board for zedboard7020 484 series, completed functions: reading XADC in temperature, VCC, and stored in the RAM, achieved through water lights look, reading and other functions.
 Downloaders recently: [More information of uploader zhangtingting]
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monitoringV5
............\BlockRAM.prj
............\BlockRAM.stx
............\BlockRAM.v
............\BlockRAM.xst
............\BLOCKtest.v
............\BLOCKtest_beh.prj
............\BLOCKtest_isim_beh.exe
............\BLOCKtest_isim_beh.wdb
............\BLOCKtest_stx_beh.prj
............\block_ram.bgn
............\block_ram.bit
............\Block_RAM.bld
............\Block_RAM.cmd_log
............\block_ram.drc
............\Block_RAM.lso
............\Block_RAM.ncd
............\Block_RAM.ngc
............\Block_RAM.ngd
............\Block_RAM.ngr
............\Block_RAM.pad
............\Block_RAM.par
............\Block_RAM.pcf
............\Block_RAM.prj
............\Block_RAM.ptwx
............\Block_RAM.stx
............\Block_RAM.syr
............\Block_RAM.twr
............\Block_RAM.twx
............\Block_RAM.ucf
............\Block_RAM.unroutes
............\Block_RAM.ut
............\Block_RAM.xpi
............\Block_RAM.xst
............\Block_RAM_bitgen.xwbt
............\Block_RAM_envsettings.html
............\Block_RAM_guide.ncd
............\Block_RAM_map.map
............\Block_RAM_map.mrp
............\Block_RAM_map.ncd
............\Block_RAM_map.ngm
............\Block_RAM_map.xrpt
............\Block_RAM_ngdbuild.xrpt
............\Block_RAM_pad.csv
............\Block_RAM_pad.txt
............\Block_RAM_par.xrpt
............\Block_RAM_stx_beh.prj
............\Block_RAM_summary.html
............\Block_RAM_summary.xml
............\Block_RAM_usage.xml
............\Block_RAM_xst.xrpt
............\fangdou.v
............\fuse.log
............\ipcore_dir
............\..........\BlockRAM
............\..........\BlockRAM.asy
............\..........\BlockRAM.gise
............\..........\BlockRAM.ncf
............\..........\BlockRAM.ngc
............\..........\BlockRAM.sym
............\..........\BlockRAM.v
............\..........\BlockRAM.veo
............\..........\BlockRAM.xco
............\..........\BlockRAM.xise
............\..........\........\blk_mem_gen_v7_3_readme.txt
............\..........\........\doc
............\..........\........\...\blk_mem_gen_v7_3_vinfo.html
............\..........\........\...\pg058-blk-mem-gen.pdf
............\..........\........\example_design
............\..........\........\..............\BlockRAM_exdes.ucf
............\..........\........\..............\BlockRAM_exdes.vhd
............\..........\........\..............\BlockRAM_exdes.xdc
............\..........\........\..............\BlockRAM_prod.vhd
............\..........\........\implement
............\..........\........\.........\implement.bat
............\..........\........\.........\implement.sh
............\..........\........\.........\planAhead_ise.bat
............\..........\........\.........\planAhead_ise.sh
............\..........\........\.........\planAhead_ise.tcl
............\..........\........\.........\xst.prj
............\..........\........\.........\xst.scr
............\..........\........\simulation
............\..........\........\..........\addr_gen.vhd
............\..........\........\..........\BlockRAM_synth.vhd
............\..........\........\..........\BlockRAM_tb.vhd
............\..........\........\..........\bmg_stim_gen.vhd
............\..........\........\..........\bmg_tb_pkg.vhd
............\..........\........\..........\checker.vhd
............\..........\........\..........\data_gen.vhd
............\..........\........\..........\functional
............\..........\........\..........\..........\simcmds.tcl
............\..........\........\..........\..........\simulate_isim.bat
............\..........\........\..........\..........\simulate_mti.bat
............\..........\........\..........\..........\simulate_mti.do
............\..........\........\..........\..........\simulate_mti.sh
............\..........\........\..........\..........\simulate_ncsim.sh
............\..........\........\..........\..........\simulate_vcs.sh
............\..........\........\..........\..........\ucli_commands.key
............\..........\........\..........\..........\vcs_session.tcl
............\..........\.

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