I own proven ADC data collection procedures, data collection through the FPGA and SRAM do with caching, using Verilog prepared, very easy to use.

ADC_Sample\ADC.bdf
..........\ADC.qpf
..........\ADC.qsf
..........\ADC.qws
..........\ADC_nativelink_simulation.rpt
..........\CLK_div.bdf
..........\CLK_div.bsf
..........\counter3.bsf
..........\counter3.vhd
..........\db\ADC.asm.qmsg
..........\..\ADC.asm.rdb
..........\..\ADC.asm_labs.ddb
..........\..\ADC.cbx.xml
..........\..\ADC.cmp.bpm
..........\..\ADC.cmp.cdb
..........\..\ADC.cmp.hdb
..........\..\ADC.cmp.idb
..........\..\ADC.cmp.kpt
..........\..\ADC.cmp.logdb
..........\..\ADC.cmp.rdb
..........\..\ADC.cmp0.ddb
..........\..\ADC.cmp1.ddb
..........\..\ADC.cmp2.ddb
..........\..\ADC.cmp_merge.kpt
..........\..\ADC.db_info
..........\..\ADC.eda.qmsg
..........\..\ADC.fit.qmsg
..........\..\ADC.hier_info
..........\..\ADC.hif
..........\..\ADC.ipinfo
..........\..\ADC.lpc.html
..........\..\ADC.lpc.rdb
..........\..\ADC.lpc.txt
..........\..\ADC.map.ammdb
..........\..\ADC.map.bpm
..........\..\ADC.map.cdb
..........\..\ADC.map.hdb
..........\..\ADC.map.kpt
..........\..\ADC.map.logdb
..........\..\ADC.map.qmsg
..........\..\ADC.map.rdb
..........\..\ADC.map_bb.cdb
..........\..\ADC.map_bb.hdb
..........\..\ADC.map_bb.logdb
..........\..\ADC.pplq.rdb
..........\..\ADC.pre_map.hdb
..........\..\ADC.pti_db_list.ddb
..........\..\ADC.root_partition.map.reg_db.cdb
..........\..\ADC.routing.rdb
..........\..\ADC.rpp.qmsg
..........\..\ADC.rtlv.hdb
..........\..\ADC.rtlv_sg.cdb
..........\..\ADC.rtlv_sg_swap.cdb
..........\..\ADC.sgate.rvd
..........\..\ADC.sgate_sm.rvd
..........\..\ADC.sgdiff.cdb
..........\..\ADC.sgdiff.hdb
..........\..\ADC.sld_design_entry.sci
..........\..\ADC.sld_design_entry_dsc.sci
..........\..\ADC.smart_action.txt
..........\..\ADC.sta.qmsg
..........\..\ADC.sta.rdb
..........\..\ADC.sta_cmp.8_slow.tdb
..........\..\ADC.syn_hier_info
..........\..\ADC.tis_db_list.ddb
..........\..\ADC.tmw_info
..........\..\ADC.vpr.ammdb
..........\..\logic_util_heursitic.dat
..........\..\prev_cmp_ADC.qmsg
..........\incremental_db\compiled_partitions\ADC.db_info
..........\..............\...................\ADC.root_partition.cmp.ammdb
..........\..............\...................\ADC.root_partition.cmp.cdb
..........\..............\...................\ADC.root_partition.cmp.dfp
..........\..............\...................\ADC.root_partition.cmp.hdb
..........\..............\...................\ADC.root_partition.cmp.kpt
..........\..............\...................\ADC.root_partition.cmp.logdb
..........\..............\...................\ADC.root_partition.cmp.rcfdb
..........\..............\...................\ADC.root_partition.map.cdb
..........\..............\...................\ADC.root_partition.map.dpi
..........\..............\...................\ADC.root_partition.map.hbdb.cdb
..........\..............\...................\ADC.root_partition.map.hbdb.hb_info
..........\..............\...................\ADC.root_partition.map.hbdb.hdb
..........\..............\...................\ADC.root_partition.map.hbdb.sig
..........\..............\...................\ADC.root_partition.map.hdb
..........\..............\...................\ADC.root_partition.map.kpt
..........\..............\README
..........\My_uart_tx.bsf
..........\My_uart_tx.v
..........\My_uart_tx.v.bak
..........\output_files\ADC.asm.rpt
..........\............\ADC.done
..........\............\ADC.eda.rpt
..........\............\ADC.fit.rpt
..........\............\ADC.fit.smsg
..........\............\ADC.fit.summary
..........\............\ADC.flow.rpt
..........\............\ADC.jdi
..........\............\ADC.map.rpt
..........\............\ADC.map.smsg
..........\............\ADC.map.summary

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