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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: RTL Download
 Description: UART has rtl, experimental tests are available, it has been used in the actual project
 Downloaders recently: [More information of uploader alex]
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RTL
...\div1_8m.v
...\filter.v
...\rcvr.v
...\rcvr_tf.v
...\txmit.v
...\txmit_tf.v
...\uart.v
...\uart_if.v
...\uart_if_fixed.v
...\uart_if_rom.ucf
...\uart_if_rom.v
...\uart_tb.v

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